Q1.G 2. 3. Consider a 48-bit virtual address; the page offset field is 14 bits. Answer the following: The number of bits in the virtual page number field is: The size of the memory page in bytes is: The number of entries in the page table is: If the virtual address is (0000 1ABD)16, use the Page Table below to find the complete physical address: index 0 1 2 V 1 0 1 Physical page number in hexadecimal A B C

Q1.G 2. 3. Consider a 48-bit virtual address; the page offset field is 14 bits. Answer the following: The number of bits in the virtual page number field is: The size of the memory page in bytes is: The number of entries in the page table is: If the virtual address is (0000 1ABD)16, use the Page Table below to find the complete physical address: index 0 1 2 V 1 0 1 Physical page number in hexadecimal A B C

Name: Q1.G1.2.3.Consider a 48-bit virtual address; the page offset field is
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Description: Q1.G1.2.3.Consider a 48-bit virtual address; the page offset field is 14 bits. Answer the following:The number of bits in the virtual page number field is:The size of the memory page in bytes is:The number of entries in the page table is:If the virt

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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4.8 Consider a machine with a byte addressable main memory of 2 bytes and block size of 8 bytes. Assume that a dircct mapped cache consisting of 32 lines is used with this machine. a. How is a 16-bit memory address divided into tag, line number, and byte number? b. Into what line would bytes with each of the following addresses be stored? 0001 0001 0001 1011 1100 0011 0011 0100 1101 0000 0001 1101 1010 1010 1010 1010 c. Suppose the byte with address 0001 10100X01 1010 is stored in the cache. What are the addresses of the other bytles stored along with it? d. How many total bytes of memory can be stored in the cache? e. Why is the lag also stored in the cache?
Consider the following hexadecimal readout: 000000 8A00 8E00 CFA1 48BF 7900 3202 9015 AD34 000010 0218 6D30 028D 3402 AD35 0288 3102 8D35 000020 0E30 0290 DAEE 3102 4C00 0200 0040 004B Refer to the first byte of memory shown above, address 000000. Assume that this byte is used to store an 8-bit unsigned integer. What is the decimal value stored in this byte? Group of answer choices 138 -27 22,842 66
4.8 Consider a machine with a byte addressable main memory of 2" bytes and block size of 8 bytes. Assume that a dircct mapped cache consisting of 32 lines is used with this machine. a. How is a 16-bit memory address divided into tag, line number, and byte number? b. Into whal line would bytes with cach ofr the following addresses be stored? 0001 0001 0001 1011 1100 0011 0011 0100 1101 0000 0X01 1101 1010 1010 1010 1010 c. Suppose the byte with address 001 10100X001010isstored in the cache. What are the addresses of the other bytes stored along with it? d. How many total bytes of memory can he stored in the cache? e. Why is the tag also storecd in the cache?
Question 10 Match the data types on the left with range of values they can represent. The range depends on the number of bytes (8-bits per byte). Assume that a modern 64-bit operating system is being used. NOTE: You can verify the size of each data type using the sizeof operator. unsigned long long float double address of char address of long long address of double -9,223,372,036,854,775,808 [Choose] -32,768 to 32,767 0 to 65,535 0 to 4,294,967,295 -128 to 127 (+/-)1.2E-38 to (+/-)3.4E+38 0 to 18,446,744,073,709,551,615 (+/-)2.3E-308 to (+/-)1.7E+308 -9,223,372,036,854,775,808 to 9,223,372,036,854,775,807 -2,147,483,648 to 2,147,483,647 0 to 255 [Choose] [Choose]
Question 4: Question 3: Consider the following code which computes the inner product of 2 vectors: prod := 0; i = 1; repeat { prod := prod + a[i] *b[i] i=i+1; until i > 20 } a. Convert the given code into Intermediate Representation - Three Address Code
.2: Below is a list of 32-bit memory address references, given as word addresses. 3, 180, 43, 2, 191, 88, 253 For each of these references, identify the binary address, the tag, and the index given a direct- mapped cache with 16 one-word blocks. Also list if each reference is a hit or a miss, assuming the cache is initially empty. For each of these references, identify the binary address, the tag, and the index given a direct-mapped cache with 2-word blocks and a total size of 8 blocks. Also list if each reference is a hit or a miss, assuming the cache is initially empty. For each of these references, identify the binary address, the tag, and the index given a direct-mapped cache with 4-word blocks and a total size of 8 blocks. Also list if each reference is a hit or a miss, assuming the cache is initially empty.
Giventhe following assignment of some program’s virtual pages to physical pages in a system with 4 KiB byte pages, what physical memory address corresponds to virtual address 20000? (All values are given in decimal.)
Consider two integer arrays B and D of 100 elements. Let X2 and X3 contain the base address of array "B" and "D", respectively, and the index į is in X0, h is in X10. Write LEGV8 code to perform the following operations: (a) Get B[15] from memory and put it in register X5. (b) Put the value 132 in D[6]. (c) Translate the following C code into LEGv8 instructions int j = 50, h; do { D[2*j] = (B[j] + B[j+2])*9 - h; j^j -2; while {j >0}; DO NOT use multiply instruction in your code, use shift instruction for multiplication instead! (d)How many instructions are executed during the running of the code in (c), and how many memory data references are made during executio'n?
Consider a processor that uses a 48-bit virtual memory address. The main memory installed onthe system is 4GB. Page size is set to be 32KB. Determine the following:I. Address space of virtual memory and physical memory. II. Total Number of virtual pages and the total physical pagesIII. How many bits are necessary to store (i) Page Table entry and (ii) TLB entry, consideringthe TLB entry stores valid, reference and dirty bits.IV. What is the size of the page table? And how many pages of memory is needed to storethe entire Page table? What fraction of physical memory is needed to store the entirepage table?
Q.2 Suppose a system has a logical address space of size 25 (m=5), a page size of 4 bytes, and a physical memory of 128 bytes. Given the following page table, find out the respective physical addresses for each of the logical address listed in Table 2. (Note: all addresses are expressed in decimal number system) Table 1: Page table 0 2 5 7 0 15 1 2 3 4 5 18 6 20 7 22 Table 2: Fill out this table with corresponding physical memory addresses Logical Address Physical Address 0 6 10 17 23
1- Write a MIPS assembly program that stores the values in consecutive successive words in the data segment with the initial offset 3000A, ending at offset 3FFEB. Then store the value 3000F to location 1000F. Next, write a code segment that sums the 128 words starting at the address found in location 1000F. This portion of the program cannot assume that 1000B contains 3000A. Print the sum and then quit. 2- Write a MIPS program that access an array of words starting at address 1000F and memory, of the length specified by the value in cx, and searches the maximum value in the array. Print the value after finding an element. 3- Write a MIPS assembly language program to reverse the numbers for two dimensional array of size 4X4
7.12. Consider a simple paging system with the following parameters: 232 bytes of physical memory; page size of 210 bytes; 216 pages of logical address space. a. How many bits are in a logical address? b. How many bytes in a frame? c. How many bits in the physical address specify the frame? d. How many entries in the page table? e. How many bits in each page table entry? Assume each page table entry contains a valid/invalid bit.