Problem 0. The following table gives some of the parameters for a number of different hardware caches. Fill in the table with the values of the missing parameters. Recall that m is the number of physical address bits, C is the cache size in bytes, B is the block size in bytes, E is the associativity, i.e., lines per set, S is the number of sets, t is the number of tag bits, s is the number of set index bits, and b is the number of block offset bits.
Problem 0. The following table gives some of the parameters for a number of different hardware caches. Fill in the table with the values of the missing parameters. Recall that m is the number of physical address bits, C is the cache size in bytes, B is the block size in bytes, E is the associativity, i.e., lines per set, S is the number of sets, t is the number of tag bits, s is the number of set index bits, and b is the number of block offset bits.
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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![**Problem 0.** The following table gives some of the parameters for a number of different hardware caches. Fill in the table with the values of the missing parameters. Recall that \( m \) is the number of physical address bits, \( C \) is the cache size in bytes, \( B \) is the block size in bytes, \( E \) is the associativity, i.e., lines per set, \( S \) is the number of sets, \( t \) is the number of tag bits, \( s \) is the number of set index bits, and \( b \) is the number of block offset bits.
\[
\begin{array}{|c|c|c|c|c|c|c|c|c|}
\hline
\text{Cache} & m & C & B & E & S & b & s & t \\
\hline
(a) & 48 & 16384 & 32 & 16 & & & & \\
(b) & 48 & 32768 & 64 & 8 & & & & \\
(c) & 32 & 65536 & 128 & 4 & & & & \\
(d) & 24 & 512 & 32 & 1 & & & & \\
(e) & 24 & 1024 & 8 & 4 & & & & \\
\hline
\end{array}
\]](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F3ee46fbe-dc71-4a56-bc58-37c83c920656%2F8a39abcc-43a7-4b03-82c4-4f170df4b67c%2Fm8ufbai_processed.png&w=3840&q=75)
Transcribed Image Text:**Problem 0.** The following table gives some of the parameters for a number of different hardware caches. Fill in the table with the values of the missing parameters. Recall that \( m \) is the number of physical address bits, \( C \) is the cache size in bytes, \( B \) is the block size in bytes, \( E \) is the associativity, i.e., lines per set, \( S \) is the number of sets, \( t \) is the number of tag bits, \( s \) is the number of set index bits, and \( b \) is the number of block offset bits.
\[
\begin{array}{|c|c|c|c|c|c|c|c|c|}
\hline
\text{Cache} & m & C & B & E & S & b & s & t \\
\hline
(a) & 48 & 16384 & 32 & 16 & & & & \\
(b) & 48 & 32768 & 64 & 8 & & & & \\
(c) & 32 & 65536 & 128 & 4 & & & & \\
(d) & 24 & 512 & 32 & 1 & & & & \\
(e) & 24 & 1024 & 8 & 4 & & & & \\
\hline
\end{array}
\]
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