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Consider a machine with a byte addressable main memory of 216 bytes and block size of 8 bytes. Assume that a direct mapped cache consisting of 32 lines is used with this machine. a. How is a 16-bit memory address divided into tag, line number, and byte number? b. Into what line would bytes with cach of the following addresses be stored? 00 01 0001 0001 1011 1100 0011 0011 0100 1101 0000 0001 1101 1010 1010 1010 1010 c. Suppose the bytc with address 0001 10100X 1010 is stored in the cache. What are the addresses of the other bytes stored along with it? d. How many tolal bytes of mcmory can be stored in the cache? e. Why is the lag also stored in the cache?

Consider a machine with a byte addressable main memory of 216 bytes and block size of 8 bytes. Assume that a direct mapped cache consisting of 32 lines is used with this machine. a. How is a 16-bit memory address divided into tag, line number, and byte number? b. Into what line would bytes with cach of the following addresses be stored? 00 01 0001 0001 1011 1100 0011 0011 0100 1101 0000 0001 1101 1010 1010 1010 1010 c. Suppose the bytc with address 0001 10100X 1010 is stored in the cache. What are the addresses of the other bytes stored along with it? d. How many tolal bytes of mcmory can be stored in the cache? e. Why is the lag also stored in the cache?

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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4.8 Consider a machine with a byte addressable main memory of 2 bytes and block size of 8 bytes. Assume that a dircct mapped cache consisting of 32 lines is used with this machine. a. How is a 16-bit memory address divided into tag, line number, and byte number? b. Into what line would bytes with each of the following addresses be stored? 0001 0001 0001 1011 1100 0011 0011 0100 1101 0000 0001 1101 1010 1010 1010 1010 c. Suppose the byte with address 0001 10100X01 1010 is stored in the cache. What are the addresses of the other bytles stored along with it? d. How many total bytes of memory can be stored in the cache? e. Why is the lag also stored in the cache?
Transcribed Image Text:4.8 Consider a machine with a byte addressable main memory of 2 bytes and block size of 8 bytes. Assume that a dircct mapped cache consisting of 32 lines is used with this machine. a. How is a 16-bit memory address divided into tag, line number, and byte number? b. Into what line would bytes with each of the following addresses be stored? 0001 0001 0001 1011 1100 0011 0011 0100 1101 0000 0001 1101 1010 1010 1010 1010 c. Suppose the byte with address 0001 10100X01 1010 is stored in the cache. What are the addresses of the other bytles stored along with it? d. How many total bytes of memory can be stored in the cache? e. Why is the lag also stored in the cache?
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