Q.2. Architecture performance [25 marks]Consider two different implementations, M1 and M2, of the same instruction set. M1 has a clockrate of 2 GHz and M2 has a clock rate of 3.3 GHz. There are two classes of instructions with thefollowing CPIs:ClassACPI for M1CPI for M22.f1.gB53C64Note that the dots in 2 fand 1.gindicate decimal points and notmultiplication.a) What are the peak MIPS performances for both machines?b) Which implementation is faster, if half the instructions executed in a certain program are fromclass A, while the rest are divided equally among classes B and C.c) What speedup factor for the execution of class-A instructions would lead to 20% overallspeedup?d) What is the maximum possible speedup that can be achieved by only improving the executionof class-A instructions? Explain why.e) What is the clock rate required for microprocessor M1 to be a "1000 MIPS" (not peak MIPS)processor?

Here's how you can solve each part of the problem:Given data:M1 Clock Rate = 2 GHzM2 Clock Rate =…

Answered: Q.2. Architecture performance [25…

C++ for Engineers and Scientists

4th Edition

ISBN:9781133187844

Author:Bronson, Gary J.

Publisher:Bronson, Gary J.

Chapter2: Problem Solving Using C++using

Section2.3: Data Types

Problem 9E: (Practice) Although the total number of bytes varies from computer to computer, memory sizes of...

See similar textbooks

Similar questions

_____ is a CPU design technique in which instruction execution is divided into multiple stages and different instructions can execute in different stages simultaneously.
If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the fetch cycle is 40% of the processor cycle time, what memory access speed is required to implement load operations with zero wait states and load operations with two wait states?
Develop a program consisting of primitive CPU instructions to implement the following procedure: integer i,a; i = 0; while (i 10) do a = i2; i = i + 1; endwhile
A(n) ________________ instruction always alters the instruction execution sequence. A(n) ______________ instruction alters the instruction execution sequence only if a specified Condition is true.
(Practice) Show how the name KINGSLEY is stored in a computer that uses the ASCII code by drawing a diagram similar to Figure 2.7, shown previously.
(For thought) a. A token of a computer language is any sequence of characters, with no intervening characters or white space, that taken as a unit has a unique meaning. Using this definition of a token, determine whether escape sequences, function names, and the keywords listed in Table 2.1 are tokens of the C++ language. b. Discuss whether adding white space to a message alters the message and whether messages can be considered tokens of C++. c. Using the definition of a token in Exercise 4a, determine whether the following statement is true: “Except for tokens of the language, C++ ignores all white space.”
The time it takes to perform the fetch instruction and decode instruction steps is called the execution time. True or false?
A problem-solving procedure that requires executing one or more comparison and branch instructions is called a(n) __________.
How does pipelining improve CPU efficiency? What’s the potential effect on pipelining’s efficiency when executing a conditional BRANCH instruction? What techniques can be used to make pipelining more efficient when executing conditional BRANCH instructions?
In the ________, memory addresses consist of a single integer.
Most Intel CPUs use the __________, in which each memory address is represented by two integers.
Processor R is a 64-bit RISC processor with a 2 GHz clock rate. The average instruction requires one cycle to complete, assuming zero wait state memory accesses. Processor C is a CISC processor with a 1.8 GHz clock rate. The average simple instruction requires one cycle to complete, assuming zero wait state memory accesses. The average complex instruction requires two cycles to complete, assuming zero wait state memory accesses. Processor R can’t directly implement the complex processing instructions of Processor C. Executing an equivalent set of simple instructions requires an average of three cycles to complete, assuming zero wait state memory accesses. Program S contains nothing but simple instructions. Program C executes 70% simple instructions and 30% complex instructions. Which processor will execute program S more quickly? Which processor will execute program C more quickly? At what percentage of complex instructions will the performance of the two processors be equal?

SEE MORE QUESTIONS

Recommended textbooks for you

C++ for Engineers and Scientists

Computer Science

ISBN:

9781133187844

Author:

Bronson, Gary J.

Publisher:

Course Technology Ptr

Systems Architecture

Computer Science

ISBN:

9781305080195

Author:

Stephen D. Burd

Publisher:

Cengage Learning

EBK JAVA PROGRAMMING

Computer Science

ISBN:

9781337671385

Author:

FARRELL

Publisher:

CENGAGE LEARNING - CONSIGNMENT

C++ for Engineers and Scientists

Computer Science

ISBN:

9781133187844

Author:

Bronson, Gary J.

Publisher:

Course Technology Ptr

Systems Architecture

Computer Science

ISBN:

9781305080195

Author:

Stephen D. Burd

Publisher:

Cengage Learning

EBK JAVA PROGRAMMING

Computer Science

ISBN:

9781337671385

Author:

FARRELL

Publisher:

CENGAGE LEARNING - CONSIGNMENT

Microsoft Visual C#

Computer Science

ISBN:

9781337102100

Author:

Joyce, Farrell.

Publisher:

Cengage Learning,

C++ Programming: From Problem Analysis to Program…

Computer Science

ISBN:

9781337102087

Author:

D. S. Malik

Publisher:

Cengage Learning

COMPREHENSIVE MICROSOFT OFFICE 365 EXCE

Computer Science

ISBN:

9780357392676

Author:

FREUND, Steven

Publisher:

CENGAGE L

SEE MORE TEXTBOOKS