Prob 4. Design a clocked synchronous finite state machine with the state/output tat shown in the Table below using D flip-flops. Use two state variables Q1 and Q2 wit state assignment A=(Q1,Q2)=00, B=01,C=11 and D=10. The machine has two inpu X2 such that when X1,X2 = 00, the machine transitions in the sequence A,B,C,D,A. when X1,X2 = 01, the machine transitions in the sequence D,C,B,A,D and when XI = 11, the machine transitions in the sequence, A,B,D,C,A. The input X1,X2 = 10 is used. Its state table and output Z is shown below. X= don't care. Input X1,X2 Next State Q1,Q2 Present State Output Z Q1,Q2 A 00 В 1 A 01 D 1 A 10 X A 11 В В 00 C 1 В 01 A 1 В 10 X X В 11 D 00 A 1 D 01 C 1 D 10 X D 11 C 00 D 1 01 В 1 C 10 X X C 11 A

Prob 4. Design a clocked synchronous finite state machine with the state/output tat shown in the Table below using D flip-flops. Use two state variables Q1 and Q2 wit state assignment A=(Q1,Q2)=00, B=01,C=11 and D=10. The machine has two inpu X2 such that when X1,X2 = 00, the machine transitions in the sequence A,B,C,D,A. when X1,X2 = 01, the machine transitions in the sequence D,C,B,A,D and when XI = 11, the machine transitions in the sequence, A,B,D,C,A. The input X1,X2 = 10 is used. Its state table and output Z is shown below. X= don't care. Input X1,X2 Next State Q1,Q2 Present State Output Z Q1,Q2 A 00 В 1 A 01 D 1 A 10 X A 11 В В 00 C 1 В 01 A 1 В 10 X X В 11 D 00 A 1 D 01 C 1 D 10 X D 11 C 00 D 1 01 В 1 C 10 X X C 11 A

Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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