Design a finite state machine (FSM)

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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Design a finite state machine (FSM) with one input A and two outputs
S and L. The FSM should detect whether a short or a long pulse
appears on input A and assert output S in case of a short pulse and
assert output L in case of a long pulse. A short pulse is defined as a
pulse that lasts up to a single state duration and a long pulse is
defined as a pulse that lasts for more than one state transition.
Draw the algorithmic state machine (ASM) chart of your FSM
design.
Transcribed Image Text:Design a finite state machine (FSM) with one input A and two outputs S and L. The FSM should detect whether a short or a long pulse appears on input A and assert output S in case of a short pulse and assert output L in case of a long pulse. A short pulse is defined as a pulse that lasts up to a single state duration and a long pulse is defined as a pulse that lasts for more than one state transition. Draw the algorithmic state machine (ASM) chart of your FSM design.
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