I need the answer as soon as possible timescale1 ns / 1 psmodule TEST gate;reg[1:0]a,b;initial begina-2'b00; #10b-2'bll; #10a-2'bll;endinitial beginb-2'b00; #40a-2'b01;endinitial#60 Cfinish;endmoduleWhich of the following correctly represents the values of "a" and "b" at the 40th nanosecond according to the above verilog code?

According to the information given:- We have to find the correct representation of "a" and "b" at…

timescale 1 ns / 1 ps module TEST gate: reg[1:0]a, b; initial begin a-2'b00; #10 b-2'b1l; #10 a-2'bll; end initial begin b-2 b00; #40 a-2'b01; end initial #60 Stinish: endmodule Which of the following correctly represents the values of "a" and "b" at the 40th nanosecond according to the above verilog code?

timescale 1 ns / 1 ps module TEST gate: reg[1:0]a, b; initial begin a-2'b00; #10 b-2'b1l; #10 a-2'bll; end initial begin b-2 b00; #40 a-2'b01; end initial #60 Stinish: endmodule Which of the following correctly represents the values of "a" and "b" at the 40th nanosecond according to the above verilog code?

C++ Programming: From Problem Analysis to Program Design

8th Edition

ISBN:9781337102087

Author:D. S. Malik

Publisher:D. S. Malik

Chapter18: Stacks And Queues

Section: Chapter Questions

Problem 11SA

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