Modify the VHDL code in Figure 7.52 by adding a parameter that sets the number of flip-flops in the coun LIBRARY ieee; USE ieee.std logic_1164.all ; USE ieee.std.logic.unsigned.all; ENTITY upcount IS PORT ( Clock, Resetn, E IN Q END upcount; STD LOGIC ; : OUT STD LOGIC_VECTOR (3 DOWNTO 0)) ; ARCHITECTURE Behavior OF upcount IS SIGNAL Count : STD LOGIC_VECTOR (3 DOWNTO 0) ; BEGIN PROCESS ( Clock, Resetn ) BEGIN IF Resetn = '0' THEN Count <= "0000" ; ELSIF (Clock’EVENT AND Clock = '1') THEN IF E ='l' THEN Count <= Count + 1 ; ELSE Count <= Count ; END IF ; END IF ; END PROCESS; Q <= Count; END Behavior; Figure 7.52 Code for a four-bit up-counter.

Modify the VHDL code in Figure 7.52 by adding a parameter that sets the number of flip-flops in the coun LIBRARY ieee; USE ieee.std logic_1164.all ; USE ieee.std.logic.unsigned.all; ENTITY upcount IS PORT ( Clock, Resetn, E IN Q END upcount; STD LOGIC ; : OUT STD LOGIC_VECTOR (3 DOWNTO 0)) ; ARCHITECTURE Behavior OF upcount IS SIGNAL Count : STD LOGIC_VECTOR (3 DOWNTO 0) ; BEGIN PROCESS ( Clock, Resetn ) BEGIN IF Resetn = '0' THEN Count <= "0000" ; ELSIF (Clock’EVENT AND Clock = '1') THEN IF E ='l' THEN Count <= Count + 1 ; ELSE Count <= Count ; END IF ; END IF ; END PROCESS; Q <= Count; END Behavior; Figure 7.52 Code for a four-bit up-counter.

Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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Question

100%

Modify the VHDL code in Figure 7.52 by adding a parameter that sets the number of flip-flops in the counter.
LIBRARY ieee;
USE ieee.std logic_1164.all;
USE ieee.std logic.unsigned.all;
ENTITY upcount IS
PORT ( Clock, Resetn, E IN
Q
END upcount;
STD LOGIC ;
: OUT STD_LOGIC_VECTOR (3 DOWNTO 0)) ;
ARCHITECTURE Behavior OF upcount IS
SIGNAL Count : STD LOGIC_VECTOR (3 DOWNTO 0) ;
BEGIN
PROCESS ( Clock, Resetn )
BEGIN
IF Resetn = '0' THEN
Count <= "0000" ;
ELSIF (Clock’EVENT AND Clock = '1') THEN
IF E = '1' THEN
Count <= Count + 1 ;
ELSE
Count <= Count;
END IF ;
END IF;
END PROCESS;
Q <= Count ;
END Behavior ;
Figure 7.52
ode for a four-bit up-counter.

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