Machine A has dual port DRAM system with the same clock for both piped and unpipelined architectures. Machine B has a single port DRAM system, but it's pipeline implementation ha times faster clock rate. Consider ldeal CPI = 1 for both; what are their comparative speed ups Memory Loads are 50% of the instructions executed? Comparative speed up is given by the %3D following equation: Ideal CPI x Pipeline depth Cycle Time, unpipelined Speedup =
Machine A has dual port DRAM system with the same clock for both piped and unpipelined architectures. Machine B has a single port DRAM system, but it's pipeline implementation ha times faster clock rate. Consider ldeal CPI = 1 for both; what are their comparative speed ups Memory Loads are 50% of the instructions executed? Comparative speed up is given by the %3D following equation: Ideal CPI x Pipeline depth Cycle Time, unpipelined Speedup =
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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