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D 7.51 The current-steering circuit of Fig. P7.51 is fabricated in a CMOS technology for which uCor= 200 µA/V, H,Cox = 80 µA/N', Vn = 0.6 V. Vp = -0.6 V, VAn=10 V/ um, and | Vi,| = 12 V/µm. If all devices have L= 0.8 um, design the circuit so that IREF = 20 µA, I, = 100 µA, I3 = I, = 20 µA, and I = 50 µA. Use the minimum possi- ble device widths needed to achieve proper operation of the current source Q for voltages at its drain as high as +1.3 V and proper operation of the current sink Q, with voltages at its drain as low as -1.3 V. Specify the widths of all devices and the value of R. Find the output resistance of the current source Q2 and the output resistance of the current sink Q,. %3D %3D %3D %3D %3D %3D %3D %3D

D 7.51 The current-steering circuit of Fig. P7.51 is fabricated in a CMOS technology for which uCor= 200 µA/V, H,Cox = 80 µA/N', Vn = 0.6 V. Vp = -0.6 V, VAn=10 V/ um, and | Vi,| = 12 V/µm. If all devices have L= 0.8 um, design the circuit so that IREF = 20 µA, I, = 100 µA, I3 = I, = 20 µA, and I = 50 µA. Use the minimum possi- ble device widths needed to achieve proper operation of the current source Q for voltages at its drain as high as +1.3 V and proper operation of the current sink Q, with voltages at its drain as low as -1.3 V. Specify the widths of all devices and the value of R. Find the output resistance of the current source Q2 and the output resistance of the current sink Q,. %3D %3D %3D %3D %3D %3D %3D %3D

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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D 7.51 The current-steering circuit of Fig. P7.51 is fabricated in a CMOS technology for which u„Cor= 200 µA/V, H,Cox = 80 µA/V, Vin= 0.6 V. Vp = -0.6 V, V,=10 V/ um, and | Vio| = 12 V/µm. If all devices have L= 0.8 um, design the circuit so that IREF = 20 µA, I, = 100 µA, I = I, = 20 µA, and Is = 50 µA. Use the minimum possi- ble device widths needed to achieve proper operation of the current source Q, for voltages at its drain as high as +1.3 V proper operation of the current sink Q, with voltages at its drain as low as -1.3 V. Specify the widths of all devices and the value of R. Find the output resistance of the current source Q2 and the output resistance of the current sink Q. %3D %3D %3D %3D %3D %3D and +1.5 V IREF R -1.5 V Figure P7.51
Transcribed Image Text:D 7.51 The current-steering circuit of Fig. P7.51 is fabricated in a CMOS technology for which u„Cor= 200 µA/V, H,Cox = 80 µA/V, Vin= 0.6 V. Vp = -0.6 V, V,=10 V/ um, and | Vio| = 12 V/µm. If all devices have L= 0.8 um, design the circuit so that IREF = 20 µA, I, = 100 µA, I = I, = 20 µA, and Is = 50 µA. Use the minimum possi- ble device widths needed to achieve proper operation of the current source Q, for voltages at its drain as high as +1.3 V proper operation of the current sink Q, with voltages at its drain as low as -1.3 V. Specify the widths of all devices and the value of R. Find the output resistance of the current source Q2 and the output resistance of the current sink Q. %3D %3D %3D %3D %3D %3D and +1.5 V IREF R -1.5 V Figure P7.51
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