b) Repeat a) with a loop to decrement the duty cycle by 25 each time before you call the function delay200ms.
#include "…\AsmIDE340\REG9s12.h" (You have to change the path)
org $2000
movb #0,PWMCLK ; NO SB or SA clock
movb #7,PWMPRCLK ;set clock A prescaler to 128
movb #1,PWMPOL ;ch. 0 output high at the start
movb #0,PWMCAE ;select left-aligned mode
movb #$0C,PWMCTL ;8-bit mode,stop PWM in wait/freeze mode
movb #250,PWMPER0 ;set period value in decimal
movb #0,PWMCNT0 ;reset the PWM0 counter
bset PWME,$01 ;enable PWM channel 0
; the following is to vary the duty cycle count
movb #225,PWMDTY0 ;set duty value to 225, 90%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #200,PWMDTY0 ;set duty value to 200, 80%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #175,PWMDTY0 ;set duty value to 175, 70%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #150,PWMDTY0 ;set duty value to 150, 60%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #125,PWMDTY0 ;set duty value to 125, 50%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #100,PWMDTY0 ;set duty value to 100, 40%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #75,PWMDTY0 ;set duty value to 75, 30%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #50,PWMDTY0 ;set duty value to 50, 20%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #25,PWMDTY0 ;set duty value to 25, 10%
ldy #5 loop the delay 5 times = 1 sec
jsr delay200ms
movb #0,PWMDTY0 ;set duty value to 0, 0%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
swi
end
;the following subroutine creates a [y] x 200 ms delay
delay200ms
movb #$90,TSCR1 ;enable TCNT and fast flags clear
movb #$07,TSCR2 ;configure prescale factor to 128
movb #$01,TIOS ;enable OC0
ldd TCNT
again1 addd #18750 ;start an output compare operation
std TC0
brclr TFLG1,$01,*
ldd TC0
dbne y,again1
rts
b) Repeat a) with a loop to decrement the duty cycle by 25 each time before you call the
function delay200ms.

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Solved in 2 steps
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