b) Repeat a) with a loop to decrement the duty cycle by 25 each time before you call the function delay200ms.
#include "…\AsmIDE340\REG9s12.h" (You have to change the path)
org $2000
movb #0,PWMCLK ; NO SB or SA clock
movb #7,PWMPRCLK ;set clock A prescaler to 128
movb #1,PWMPOL ;ch. 0 output high at the start
movb #0,PWMCAE ;select left-aligned mode
movb #$0C,PWMCTL ;8-bit mode,stop PWM in wait/freeze mode
movb #250,PWMPER0 ;set period value in decimal
movb #0,PWMCNT0 ;reset the PWM0 counter
bset PWME,$01 ;enable PWM channel 0
; the following is to vary the duty cycle count
movb #225,PWMDTY0 ;set duty value to 225, 90%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #200,PWMDTY0 ;set duty value to 200, 80%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #175,PWMDTY0 ;set duty value to 175, 70%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #150,PWMDTY0 ;set duty value to 150, 60%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #125,PWMDTY0 ;set duty value to 125, 50%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #100,PWMDTY0 ;set duty value to 100, 40%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #75,PWMDTY0 ;set duty value to 75, 30%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #50,PWMDTY0 ;set duty value to 50, 20%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
movb #25,PWMDTY0 ;set duty value to 25, 10%
ldy #5 loop the delay 5 times = 1 sec
jsr delay200ms
movb #0,PWMDTY0 ;set duty value to 0, 0%
ldy #5 ;loop the delay 5 times = 1 sec
jsr delay200ms
swi
end
;the following subroutine creates a [y] x 200 ms delay
delay200ms
movb #$90,TSCR1 ;enable TCNT and fast flags clear
movb #$07,TSCR2 ;configure prescale factor to 128
movb #$01,TIOS ;enable OC0
ldd TCNT
again1 addd #18750 ;start an output compare operation
std TC0
brclr TFLG1,$01,*
ldd TC0
dbne y,again1
rts
b) Repeat a) with a loop to decrement the duty cycle by 25 each time before you call the
function delay200ms.
![Lab # 10 Dimming the LED
• Set the prescaler to be 128.
Set the generated waveform frequency to be 750 Hz.
24 MHz 24x10
128
= 187.5 KHz = Period E clock =
128
128
24x10°
1
Period of generated waveform
750
1 24 x10°
- = 250
128
# of counts for one period
750
• Duty cycle = 50%, it is left-aligned mode, and the polarity starts with high.
Duty cycle - 90%
Duty cycle 70%
Duty cycle - 50%
Duty cycle 30%
Duty cycle = 10%
movb #225, PWMDTYO
movb #175, PWMDTYO
movb #125, PWMDTYO
movb #75, PWMDTYO
Duty cycle - 80%
Duty cycle = 60%
Duty cycle - 40%
Duty cycle - 20%
Duty cycle = 0%
movb #200, PWMDTYO
movb #150, PWMDTYO
movb #100, PWMDTYO
movb #50, PWMDTYO
#0, PWMDTYO
movb #25, PWMDTYO
movb
; select clock A as the clock source for PWMO
; set elock A prescaler to 128
; channel 0 output high at the start of the period
; select left-aligned mode
; 8-bit mode, stop PWM in wait and freeze mode
; set period value in decimal
; set duty value in decimal
; reset the PWMO counter
; enable PWM0
movb
#0, PWMCLK
#7, PWMPRCLK
#1, PWMPOL
#0, PWMCAE
#$0C, PWMCTL
#250, PWMPERO
#125, PWMDTYÖ
#0, PWMCNTO
PWME, $01
movb
movb
movb
movb
movb
movb
movb
bset
PWME
PWME7
PWME 6
PWME5
PWME 4
PWME 3
PWME2
PWME1
PWMEO
1/$01
1
PWMPOL
PPOL7
PPOL6
PPOL5
PPOL4
PPOL3
PPOL2
PPOL1
PPOLO
1
PWMCLK
PCLK7
PCLK6
PCLK5
PCLK4
PCLK3
PCLK2
PCLK1
PCLKÓ
PWMPRCLK
PCKB2
PCKB1
РСКВО
РСКА2
РСКА1
РСКАО
7/$07
1
1
PWMCAE
CAE7
CAE6
CAE5
CAE4
CAE3
CAE2
CAE1
CAEO
PWMCTL
CON67
CON45
CON23
CONO1
PSWAI
PFRZ
1
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