ache is organized as a 4 way set associative cache Each set's cache line consists of 4 words (meaning there are 16 bytes per line, for each set of the cache). Each set individually has one Valid bit, and one Dirty bit, for each line. The tag field of this cache is 8 bits wide. The address is 32 bits wide. Question 1a) What is the number of cache lines? Question 1b) What is the total number of 'memory bitcells' that are needed to design this cache (note, this includes the bitcells required for the tags, valid and dirty bits).

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
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Chapter1: Computer Networks And The Internet
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A cache is organized as a 4 way set associative cache

Each set's cache line consists of 4 words (meaning there are 16 bytes per line, for each set of the cache).

Each set individually has one Valid bit, and one Dirty bit, for each line.

The tag field of this cache is 8 bits wide.

The address is 32 bits wide.

Question 1a) What is the number of cache lines?

Question 1b) What is the total number of 'memory bitcells' that are needed to design this cache (note, this includes the bitcells required for the tags, valid and dirty bits).

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