A CPU has 32-bit memory address and a 256 KB cache memory. The cache is organized as a 4-way set associative cache with cache block size of 16 bytes. What will be the number of bits in the TAG, SET, BYTE offset fields?
A CPU has 32-bit memory address and a 256 KB cache memory. The cache is organized as a 4-way set associative cache with cache block size of 16 bytes. What will be the number of bits in the TAG, SET, BYTE offset fields?
Chapter11: Operating Systems
Section: Chapter Questions
Problem 22VE
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![A CPU has 32-bit memory address and a
256 KB cache memory. The cache is
organized as a 4-way set associative cache
with cache block size of 16 bytes.
What will be the number of bits in the TAG,
SET, BYTE offset fields?](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F247f10fc-29e3-4a7b-a98a-fb8bbc77fbb5%2F7d3bcdef-a00f-4e21-9c24-8d37757eb514%2Fdc73cz8_processed.jpeg&w=3840&q=75)
Transcribed Image Text:A CPU has 32-bit memory address and a
256 KB cache memory. The cache is
organized as a 4-way set associative cache
with cache block size of 16 bytes.
What will be the number of bits in the TAG,
SET, BYTE offset fields?
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