[2.1] A CPU with a clock of 2.8 GHz has an execution time of 10 sec for an app consisting of 4x10 instructions. (7 grades) a. What is the average CPI in this case? b. The app in question (a) is formed of three classes of instructions: Class A making up 50% of the instructions and having CPIA = 3 cycles/instruction, while Class B is making up 30% of instructions and having a CPIB = 4 cycles/instruction. What is the CPI of instructions of Class C? c. Compiler optimization results in a 20% improvement in execution time compared to that in question (a). What is the instruction count after optimization, if average CPI increased by 10% from that in question (b)? How does performance before (Performance old) and after optimization (Performancenew) compare? d. The computer in question (c) takes 10 sec, 20 sec, 30 sec and 40 sec, respectively, to execute 4 benchmark programs. A reference machine takes 200 sec, 300 sec, 400 sec and 600 sec to execute these same programs. What are the normalized executions times a1, a2, a3, a4 in this case? What is their geometric mean? e. The computer in question (c) has a CPU made of 50% thinner silicon wafer than that of the older reference machine. The reference machine has a clock operating at 50% the frequency of the newer computer, but at the same voltage. How does the dynamic power consumption of the newer computer Pnew compare to that of the reference one Pref (hint capacitive load is proportional with Capacitance, which in turn depends on distance between transistor gates) assume

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[2.1] A CPU with a clock of 2.8 GHz has an execution time of 10 sec for an app consisting of
4x10 instructions. (7 grades)
a. What is the average CPI in this case?
b.
The app in question (a) is formed of three classes of instructions: Class A making up 50% of
the instructions and having CPIA = 3 cycles/instruction, while Class B is making up 30% of
instructions and having a CPIB = 4 cycles/instruction. What is the CPI of instructions of
Class C?
c. Compiler optimization results in a 20% improvement in execution time compared to that in
question (a). What is the instruction count after optimization, if average CPI increased by
10% from that in question (b)? How does performance before (Performance old) and after
optimization (Performance new) compare?
d. The computer in question (c) takes 10 sec, 20 sec, 30 sec and 40 sec, respectively, to execute
4 benchmark programs. A reference machine takes 200 sec, 300 sec, 400 sec and 600 sec to
execute these same programs. What are the normalized executions times a1, a2, a3, a4 in
this case? What is their geometric mean?
e. The computer in question (c) has a CPU made of 50% thinner silicon wafer than that of the
older reference machine. The reference machine has a clock operating at 50% the frequency
of the newer computer, but at the same voltage. How does the dynamic power consumption
of the newer computer Pnew compare to that of the reference one Pref (hint - assume
capacitive load is proportional with Capacitance, which in turn depends on distance between
transistor gates)
Transcribed Image Text:[2.1] A CPU with a clock of 2.8 GHz has an execution time of 10 sec for an app consisting of 4x10 instructions. (7 grades) a. What is the average CPI in this case? b. The app in question (a) is formed of three classes of instructions: Class A making up 50% of the instructions and having CPIA = 3 cycles/instruction, while Class B is making up 30% of instructions and having a CPIB = 4 cycles/instruction. What is the CPI of instructions of Class C? c. Compiler optimization results in a 20% improvement in execution time compared to that in question (a). What is the instruction count after optimization, if average CPI increased by 10% from that in question (b)? How does performance before (Performance old) and after optimization (Performance new) compare? d. The computer in question (c) takes 10 sec, 20 sec, 30 sec and 40 sec, respectively, to execute 4 benchmark programs. A reference machine takes 200 sec, 300 sec, 400 sec and 600 sec to execute these same programs. What are the normalized executions times a1, a2, a3, a4 in this case? What is their geometric mean? e. The computer in question (c) has a CPU made of 50% thinner silicon wafer than that of the older reference machine. The reference machine has a clock operating at 50% the frequency of the newer computer, but at the same voltage. How does the dynamic power consumption of the newer computer Pnew compare to that of the reference one Pref (hint - assume capacitive load is proportional with Capacitance, which in turn depends on distance between transistor gates)
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