Main memory of the basic computer has been shown in the figure below, each instruction and memory variables are represented with the respective physical address (in red and bold font) of each location. PC has value of 1028h and addressing mode is direct. Main MemoryAddressContent1028hLDA 2011h;1029hBUN 102Bh;102AhADD 2012h;102BhAND 2012h;::2011h0;2012h1; You are required answer following questions.How these instructions will be executed according to instruction execution cycle with respect to the timing signals (T0, T1, T2..)? (10)What will be the value of these registers (PC, AR, DR, IR and AC) with respect to timing signals during the execution of each instruction? (10)What will the final outcome of the after the execution of instruction at physical address 102Bh? (5) Memory - reference instructionANDADDLDASTADT.DR - M [MAR]D,T.D;T.DR -MLAR)M(AR) + ACSC-0DR MIAR]DT,D,T,D;T,AC + AC A DRAC - AC + DRE-CaSC -0AC + DRsC -0SC-0BUNBSAISZDJ.DJ.DR -M (AR]DT.PC+ ARM LAR] – PCSC-0AR AR +1D,TD,T,DR - DR + 1PC+ ARSC-ODJ.M(AR) + DRIf (DR = 0)then (PC+ PC + 1)SC-0

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Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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Main memory of the basic computer has been shown in the figure below, each instruction and memory variables are represented with the respective physical address (in red and bold font) of each location. PC has value of 1028h and addressing mode is direct.

Main Memory
Address	Content
1028h	LDA 2011h;
1029h	BUN 102Bh;
102Ah	ADD 2012h;
102Bh	AND 2012h;
:	:
2011h	0;
2012h	1;

You are required answer following questions.

How these instructions will be executed according to instruction execution cycle with respect to the timing signals (T0, T1, T2..)? (10)
What will be the value of these registers (PC, AR, DR, IR and AC) with respect to timing signals during the execution of each instruction? (10)
What will the final outcome of the after the execution of instruction at physical address 102Bh? (5)