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Mechanical Engineering

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Apr 3, 2024

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John Nguyen 1.In the following code sequence, show the value of AL after each shift or rotate instruction has executed: mov al,0D4h shr al,1 ; a. mov al,0D4h sar al,1 ; b. mov al,0D4h sar al,4 ; c. mov al,0D4h rol al,1 ; d. Answer: (a) 6Ah (b) EAh (c) FDh (d) A9h 2.In the following code sequence, show the value of AL after each shift or rotate instruction has executed: mov al,0D4h ror al,3 ; a. mov al,0D4h rol al,7 ; b. stc mov al,0D4h rcl al,1 ; c. stc

mov al,0D4h rcr al,3 ; d. Answer: (a) 9Ah (b) 6Ah (c) 0A9h (d) 3Ah 3.What will be the contents of AX and DX after the following operation? mov dx,0 mov ax,222h mov cx,100h mul cx Answer: DX = 0002h, AX = 2200h. 4.What will be the contents of AX after the following operation? mov ax,63h mov bl,10h div bl Answer: AX = 0306h 5.What will be the contents of EAX and EDX after the following operation? mov eax,123400h mov edx,0 mov ebx,10h div ebx Answer: EDX = 0, EAX = 00012340h. 6.What will be the contents of AX and DX after the following operation?

mov ax,4000h mov dx,500h mov bx,10h div bx Answer: The DIV will cause a divide overflow, so the values of AX and DX cannot be determined. 7.What will be the contents of BX after the following instructions execute? mov bx,5 stc mov ax,60h adc bx,ax Answer: 0066h 8.Describe the output when the following code executes in 64-bit mode: .data dividend_hi QWORD 00000108h dividend_lo QWORD 33300020h divisor QWORD 00000100h .code mov rdx,dividend_hi mov rax,dividend_lo div divisor Answer:The division operation's quotient, which will be saved in the rax register, will be the code's output. The quotient will be a 64-bit value since the code performs an unsigned division of a 128-bit dividend by a 64-bit divisor. Dividend_hi and dividend_lo are two 64-bit numbers that make up the dividend. Both the dividend_hi and dividend_lo values are loaded into the rdx and rax registers, respectively. The 128-bit dividend is then divided by the 64-bit divisor value, which is kept at memory address divisor, using the div instruction. There will be no remainder value retained; just the quotient of the division operation will be kept in the rax register.

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9.The following program is supposed to subtract val2 from val1. Find and correct all logic errors (CLC clears the Carry flag): .data val1 QWORD 20403004362047A1h val2 QWORD 055210304A2630B2h result QWORD 0 .code mov cx,8 ; loop counter mov esi,val1 ; set index to start mov edi,val2 clc ; clear Carry flag top: mov al,BYTE PTR[esi] ; get first number sbb al,BYTE PTR[edi] ; subtract second mov BYTE PTR[esi],al ; store the result dec esi dec edi loop top Answer: The corrected assembly code subtracts the bytes in val2 from the corresponding bytes in vall and stores the result back in vall . It uses 64-bit registers ( rsi and rdi ) and a loop to perform the byte-by-byte subtraction. The Carry flag is cleared before the subtraction. 10.What will be the hexadecimal contents of RAX after the following instructions execute in 64-bit mode? .data multiplicand QWORD 0001020304050000h