Midterm Exam II - Solution_S22

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1 EE118 Spring 2022 SANJOSE STATE UNIVERSITY Department of Electrical Engineering MITERM II -- Digital Logic Circuit Design April 20, 2022 -- Closed Book & Closed Notes -- -- No cell, No Crib Sheet Allowed -- -- Only simple basic calculator allowed -- STUDENT NAME: (Last) , (First) STUDENT ID NUMBER (LAST 4 DIGITS): No interpretation of test problems will be given during the test. If you are not sure of what is intended, make appropriate assumptions and continue. Do not unstaple !!! Problems 1-14(5 points each) TOTAL Problems 15, 16, 17 (10 pts each) The last page is for reference

2 II I PROBLEM 1 (5 points) For the MUX-based circuit shown below, the output function would be ? A. XY +X’W’+Z’Y’ B. X’Z’+X’W’+Z’Y’ C. XY’ +X’Y + ZX’Y’ D. X’Z’+Z’Y’+ZX’W’ E. None of the above PROBLEM 2 (5 points) For a 2-bit comparator comparing 2-bit numbers A= (a1a0) and B= (b1b0), what is the proper function for the f(A>B) output through logical reasoning? A. a1’b1 + (a1’b1’ + a1b1) a0’b0 B. a1b1’ + (a1’b1’+ a1b1) a0b0’ C. a1a0’ + (a1’a0 + b1’b0) a0’b0 D. a1b1 + b1’b0’a1’a0 + b1b0’a1a0 E. None of the above PROBLEM 3 (5 points) Which pair shows the correct values of Q at time I and II on the following timing diagram for a positive edge-triggered T flip-flop, assuming no delay between the inputs and the output? C T Q

3 A. (I, II) = (1, 1) B. (I, II) = (0, 0) C. (I, II) = (1, 0) D. (I, II) = (0, 1) PROBLEM 4 (5 points) Which statement is not true? A. Any combinational circuit may be designed using encoders only. B. A hazard in a digital system is an undesirable effect caused by either a deficiency in the system or external influences. C. Any combinational circuit may be designed using multiplexers only. D. Any combinational circuit may be designed using decoders only PROBLEM 5 (5 points) What is the priority scheme for this encoder? Inputs Outputs X3 X2 X1 X0 Y1 Y0 d d d 1 0 0 d 1 d 0 1 0 1 0 0 0 1 1 d 0 1 0 0 1 A. X3>X2>X0>X1 B. X2>X3>X0>X1 C. X0>X2>X3>X1 D. X0>X2>X1>X3 E. None of the above PROBLEM 6 (5 points) The excitation table of a RS flip/flop is A. True B. False PROBLEM 7 (5 points) Q Q+ R S 0 0 0 d 0 1 0 1 1 0 1 0 1 1 d 0

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4 Identify the following digital circuit A. Encoder B. Multiplexer C. Decoder-multiplexer B. Decoder C. None of the above PROBLEM 8 (5 pts) Which is the best hazard-free expression for the output function F(A,B,C,D) = ∑m(1,3,5,7,8,9,12,13,14,15) A. AB + BC + CD + AD + BD B. AB + A’D + CD + AD + BD C. AB + A’D + AC’ + C’D + BD D. AB + A’D + AC’ + AD + BD E. None of the above PROBLEM 9 (5 points)

5 What is the proper state equation Q2+ for the circuit below? A. Q1’Q2 B. Q2’Q1 C. Q1’Q2’ D. Q1Q2 E. None of the above PROBLEM 10 (5 pts) Which Boolean expression corresponds to the function B( W,X,Y,Z ) implemented ted by the following “non-priority’ encoder-based circuit? Assume that one and only one input is high at any time A. Y+Z B. W+Y C. X+Y D. X+Z E. None of the above PROBLEM 11 (5 points)

6 A R/S flip-flop is to be used to implement the above state diagram. Which is the correct excitation R ? A. X’ B. 0 C. Q’X D. X+Q’ E. None of the above PROBLEM 12 (5 pts) Given the following state transition table of a cross-coupled circuit, XY are the input, G1G2 represent the state. Suppose the input change from 11 to 10 while initially in state A, what is the next stable state that the circuit will end up in? PROBLEM 13 (5 points) A. 00 B. 01 C. 10 D. 11

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7 Suppose the frequency of the input clock is 200 MHz, what is the frequency of Q3? A. 100 MHz B. 50 MHz C. 25 MHz D. 12.5 MHz E. None of the above PROBLEM 14 . [5pts] In the following positive edge clock triggered master-slave RS f/f’s input waveform, mark the correct catch 1 and catch 0 condition A. III: Catch 0, II Catch 1 B. II: Catch 1, IV Catch 0 C. I: Catch1, II: Catch 0 D. I: Catch 1, III: Catch 0 E. None of the above PROBLEM 15 . [10 pts] Derive the minimal SOP expression for F(V,W,X,Y)

8 F = av’w’+v’w’+bvw = (x+y)v’w’+v’w+(x’y’+xy’)vw F = xv’w’+yv’w’+v’w+ y’vw = ∑m(1,2,3,4,5,6,7,12,14) = wy’+v’x+v’y PROBLEM 16 [10pts] Derive the minimal SOP expression for output F(W,X,Y,Z) F = EN2(X’Z+XZ) = EN2.Z EN2 = (a+b+c) = W(X’Y’+YX’+XY) = W(X’+XY) = W(X’+Y) F = W(X’+Y)Z = WX’Z + WYZ

9 PROBLEM 17 [10 pts] Consider the given the circuit below (a) What are the excitation equations and the output equations (5pts) (b) Derive the transition table (5pts) a. Excitation and Output equations J1 = xy2 K1 = x’ J2 = x K2 = y1’ + x’ Z = J1y1 = xy2y1 b. Transition Table Transition Equations y1+ = J1y1’ + K1’y1 = xy2y1’ + xy1 = x(y2y1’+y1) = x(y2+y1) y2+ = J2y2’ + K2’y2 = xy2’ + (y1’ + x’)’y2 = xy2’ + y1xy2 = x(y2’+y1y2) =x(y2’+y1)

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10 Transition Table y1+y2+ / z y1y2 x=0 x=1 00 00 / 0 01 / 0 01 00 / 0 10 / 0 11 00 / 0 11 / 1 10 00 / 0 11 / 0

11 Reference: Boolean Theorems Theorem 1: Idempotency (a) a+a=a (b) a.a=a Theorem 2: Null elements for + and . Operators (a) a+1=1 (b) a.0=0 Theorem 3: Involution (a ’ ) ’ = a Theorem 4: Absorption (a) a+ab = a (b) a(a+b) = a Theorem 5: (a) a+a ’ b = a+b (b) a(a ’ +b) =ab Theorem 6: (a) ab+ab ’ = a (b) (a+b)(a+b ’ ) = a Theorem 7: (a) ab+ab ’ c =ab +ac (b) (a+b)(a+b ’ +c) = (a+b)(a+c) Theorem 8: DeMorgan ’ s theorem (a) (a+b) ’ = a ’ .b ’ (b) (a.b) ’ = a ’ +b ’ Theorem 9: Consensus (a) ab+a ’ c+bc = ab+a ’ c (b) (a+b)(a ’ +c)(b+c) = (a+b)(a ’ +c) Theorem 10: Shannon ’ s Expansion (a) f(x 1 ,x 2 , … ,x n ) = x 1 . f(1,x 2 , … ,x n ) + x ’ 1 . f(0,x 2 , … ,x n ) (b) f(x 1 ,x 2 , … ,x n ) = [x 1 + f(0,x 2 , … ,x n )] [x ’ 1 + f(1,x 2 , … ,x n )]