Lab report 0

A) List and describe 10 features of the Atmel ATmega 2560 AVR microcontroller (use the ATmega 2560 complete reference manual for help). B) List and describe two AVR instructions. As part of your description make sure that you list the operation for each instruction that is provided in the instruction set summary.

I need expert assistance in solving the choices, providing evidence not through explanations but through images or by illustrating with a diagram of the EMU8086 processor. -1. The Intel 8086 microprocessor can read/write 16 bit data from or to a. I/O device b. register (C, memory d. processor 2. Which unit in the 8086 microprocessor is responsible for pre-fetching instructions from memory? a. EU b. ALU c. BIU 3. The memory of 1M byte size could be divided into a. twenty-one b. thirty-four d. CU Kbyte segments. d. sixty-four c. thirty-three 4. Which of the following programming statements is NOT a valid comparison operator in Arduino? != (not equal to) b. < (less than) c. and (logical AND) d. = (equal to) 5. How many A/D converter inputs pins does port-E in the PIC16F877A? b. 6-Pins c. 4-Pins a. 3-Pins 6. How much the size of the program memory space in the b. 16Kx16 bits c. 8Kx14 bits a. 32Kx8 bits 8-Pins PIC16F877A microcontroller? d. 4Kx14 bits

List and describe two AVR instructions. As part of your description make sure that you list the operation for each instruction that is provided in the instruction set summary.

Please may you give the solution to this computer science question! Thank you

Draw a 14 ic chip wiring diagram with labeled switches(A, B, C) of a 3 input of this logic diagram.

Q2. (a) Figure 2 shows the pinout diagram (and their functional description) of the 2114 Static RAM memory IC. Using a neat sketch show how such IC may be interfaced with an M68000 microprocessor to realise a system that needs 1K x 16 bits of RAM. [Note: 2114 is a 4-bit memory IC. You will need multiple ICs to make up the 16-bit address bus of M68000 processor.] Ao-Ag Pin Names Address Inputs A6 1 A5 2 A4 AO 5 A16 A2 7 CS 8 GND 9 -23456782 18 Vcc WE Write Enable 17 A7 CS Chip Select 16 A8 1/0₁-1/04 Data Input/Output A3 4 15 A9 VCC Power (+5V) GND Ground 14 I/O 1 13 I/O 2 Truth Table 12 1/03 CS WE Comments 11 I/O 4 H X Chip Deselected L L Write 10 WE L H Read Figure 2 (b) Design an address decoder circuit to realise the following memory map (shown below in hexadecimal notation). The unused address range should generate an active low signal to be connected to the BERR* input of the M68000 microprocessor. Use the partial address decoding technique for your design. ROM1 00 0000 03 FFFF…

Q2. (a) Figure 2 shows the pinout diagram (and their functional description) of the 2114 Static RAM memory IC. Using a neat sketch show how such IC may be interfaced with an M68000 microprocessor to realise a system that needs 1K x 16 bits of RAM. [Note: 2114 is a 4-bit memory IC. You will need multiple ICs to make up the 16-bit address bus of M68000 processor.] Ao-Ag Pin Names Address Inputs A6 1 A5 2 A4 3 A3 4 AO 5 A1 6 A2 7 CS 8 GND 9 +23456700 18 Vcc WE Write Enable 17 A7 CS Chip Select 16 A8 1/01-1/04 Data Input/Output 15 A9 Vcc Power (+5V) GND Ground 14 I/O 1 13 I/O 2 Truth Table 12 1/03 CS WE Comments 11 1/04 Н Chip Deselected L L Write 10 WE L H Read Figure 2 (b) Design an address decoder circuit to realise the following memory map (shown below in hexadecimal notation). The unused address range should generate an active low signal to be connected to the BERR* input of the M68000 microprocessor. Use the partial address decoding technique for your design. ROM1 00 0000 03 FFFF…

1. Moore's Law: 1) What is Moore's Law about? 2) Why we have been used Moore's law to predict computer performance before multicore? 3) What limits the performance scaling based on Moore's law

I need the answer as soon as possible

Y=f(A,B,C)=(0,4,5)+don't care(2)

What is a TTL circuit? What are their main characteristics? (Input voltage and current, output voltage and current, Vcc, …)

(a) Consider the flipflop circuits below: (i) Name the 2 circuits given in the figure. Explain how they are different from each other. a. b. (ii) Choose from the list the input that triggers data to travel to the next flipflop in a counter. A: Input at top NAND gate B: Input at bottom NAND gate C: Clock input clk Q

Write a Verilog code with testbench for 16-bit up/down counter with synchronous reset and synchronous up/down.If up/down is set the counter is up counter and if it is not set, the counter is a down counter.     submit the module code, testbench code, and the simulation results. PLEASE EXECUTE CODE IN VERILOG