Chapter 9, Problem 33E

1.

Program Plan Intro

Reduced Instruction Set Computer (RISC):

• In this computer, the Instruction Set Architecture (ISA) allows lesser number of Cycles Per Instruction (CPI) when compared to Complex Instruction Set Computer.
• As this contains a simple and general set of instructions, it is also called as “Relegate interesting stuff to the Compiler”.
• It also has another trait and that is the load/store architecture, in which the memory is accessed through specific instructions rather than as a part of most instructions.

Explanation of Solution

Simple instructions averaging one clock to execute:

Simple instructions averaging one clock for execution is suitable for RISC because the instruction related to RISC machines are easy to understand and implement. They include hardwired control to execute the instructions in one clock cycle.

2.

Program Plan Intro

Complex Instruction Set Computer (CISC):

• Complex instruction set computing uses the variable length instructions and accesses memory directly and efficiently.
• As the length of the instructions increases, the processing time also increases.

Explanation of Solution

Single register set:

Single register set is suitable for CISC because different types of registers can be controlled using the register windows. The register windows are overlapped and shifted from one register to another register and includes partitions like global registers, local registers and input and output registers.

3.

Program Plan Intro

Reduced Instruction Set Computer (RISC):

• In this computer, the Instruction Set Architecture (ISA) allows lesser number of Cycles Per Instruction (CPI) when compared to Complex Instruction Set Computer.
• As this contains a simple and general set of instructions, it is also called as “Relegate interesting stuff to the Compiler”.
• It also has another trait and that is the load/store architecture, in which the memory is accessed through specific instructions rather than as a part of most instructions.

Explanation of Solution

Complexity is in the compiler:

Complexity is in the complier is suitable for RISC because rather than microcode inter processor, compiler efficiency is compared for checking the quality of the RISC machines.

4.

Program Plan Intro

Reduced Instruction Set Computer (RISC):

• In this computer, the Instruction Set Architecture (ISA) allows lesser number of Cycles Per Instruction (CPI) when compared to Complex Instruction Set Computer.
• As this contains a simple and general set of instructions, it is also called as “Relegate interesting stuff to the Compiler”.
• It also has another trait and that is the load/store architecture, in which the memory is accessed through specific instructions rather than as a part of most instructions.

Explanation of Solution

Highly pipelined:

Highly pipelined is suitable for RISC because the instruction pipelining is done by using microcode pipelining including many factors like data dependency.

5.

Program Plan Intro

Complex Instruction Set Computer (CISC):

• Complex instruction set computing uses the variable length instructions and accesses memory directly and efficiently.
• As the length of the instructions increases, the processing time also increases.

Explanation of Solution

Any instruction can reference memory:

Any instruction can be used as reference memory is suitable for CISC because the instructions related to CISC are difficult to understand and implement and can access the memory directly.

6.

Program Plan Intro

Complex Instruction Set Computer (CISC):

• Complex instruction set computing uses the variable length instructions and accesses memory directly and efficiently.
• As the length of the instructions increases, the processing time also increases.

Explanation of Solution

Instructions are interpreted by the micro-program:

Instructions are interpreted by using the micro-processor is suitable for CISC because the microcode efficiency is used for controlling the execution of instruction and calculating its difficulty.

7.

Program Plan Intro

Reduced Instruction Set Computer (RISC):

• In this computer, the Instruction Set Architecture (ISA) allows lesser number of Cycles Per Instruction (CPI) when compared to Complex Instruction Set Computer.
• As this contains a simple and general set of instructions, it is also called as “Relegate interesting stuff to the Compiler”.
• It also has another trait and that is the load/store architecture, in which the memory is accessed through specific instructions rather than as a part of most instructions.

Explanation of Solution

Fixed length, easily decode instruction format:

Fixed length and easily decoded instruction format are suitable for RISC because the fixed length instructions present in RISC machines can be executed using minimum number of clock cycles. The difficulty of the instructions depends on the hardware used and hence they can be decoded easily.

8.

Program Plan Intro

Complex Instruction Set Computer (CISC):

• Complex instruction set computing uses the variable length instructions and accesses memory directly and efficiently.
• As the length of the instructions increases, the processing time also increases.

Explanation of Solution

Highly specialized, infrequently used instructions:

Highly specialized and instructions used infrequently are suitable for CISC because the instructions related to the CISC architecture includes high complexity and hence the instructions are specialized and used for specialized reasons.

9.

Program Plan Intro

Reduced Instruction Set Computer (RISC):

• In this computer, the Instruction Set Architecture (ISA) allows lesser number of Cycles Per Instruction (CPI) when compared to Complex Instruction Set Computer.
• As this contains a simple and general set of instructions, it is also called as “Relegate interesting stuff to the Compiler”.
• It also has another trait and that is the load/store architecture, in which the memory is accessed through specific instructions rather than as a part of most instructions.

Explanation of Solution

Use of overlapping registers windows:

Using the overlapping register windows is suitable for RISC because the registers related to RISC architecture include high efficiency and performance with modularization technique.

10.

Program Plan Intro

Reduced Instruction Set Computer (RISC):

• In this computer, the Instruction Set Architecture (ISA) allows lesser number of Cycles Per Instruction (CPI) when compared to Complex Instruction Set Computer.
• As this contains a simple and general set of instructions, it is also called as “Relegate interesting stuff to the Compiler”.
• It also has another trait and that is the load/store architecture, in which the memory is accessed through specific instructions rather than as a part of most instructions.

Explanation of Solution

Relatively few addressing modes:

Relatively few addressing modes is suitable for RISC because the RISC architecture includes five number of addressing nodes which helps in calculating the memory location of address related to the instructions.