Chapter 4.5, Problem 4.44PP

A.

Program Plan Intro

Assembly code for Conditional jump:

long absSum(long *start, long count)

start in %rdi, count in %rsi

absSum:

irmovq $8, %r8

irmovq $1, %r9

xorq %rax, %rax     

andq %rsi, %rsi

jmp test

loop:

mrmovq (%rdi),%r10

xorq %r11, %r11

subq %r10, %r11

jle pos

rrmovq %r11, %r10

pos:

addq %r10, %rax

addq %r8, %rdi

subq %r9, %rsi

test:

jne loop

ret

Assembly code for Conditional move:

long absSum(long *start, long count)

start in %rdi, count in %rsi

absSum:

irmovq $8, %r8

irmovq $1, %r9

xorq %rax, %rax

andq %rsi, %rsi

jmp test

loop:

mrmovq (%rdi),%r10

xorq %r11, %r11

subq %r10, %r11

cmovg %r11, %r10

addq %r10, %rax

addq %r8, %rdi

subq %r9, %rsi

test:

jne loop

ret

Processing stages:

• The processing of an instruction has number of operations.
• The operations are organized into particular sequence of stages.
• It attempts to follow a uniform sequence for all instructions.
• The description of stages are shown below:
  • Fetch:
    • It uses program counter “PC” as memory address to read instruction bytes from memory.
    • The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.
    • It fetches “valC” that denotes an 8-byte constant.
    • It computes “valP” that denotes value of “PC” plus length of fetched instruction.
  • Decode:
    • The register file is been read with two operands.
    • It gives values “valA” and “valB” for operands.
    • It reads registers with instruction fields “rA” and “rB”.
  • Execute:
    • In this stage the ALU either performs required operation or increments and decrements stack pointer.
    • The resulting value is termed as “valE”.
    • The condition codes are evaluated and destination register is updated based on condition.
    • It determines whether branch should be taken or not in a jump instruction.
  • Memory:
    • The data is been written to memory or read from memory in this stage.
    •  The value that is read is determined as “valM”.
  • Write back:
    • The results are been written to register file.
    • It can write up to two results.
  • PC update:
    • The program counter “PC” denotes memory address to read bytes of instruction from memory.
    • It is used to set next instruction’s address.

B.

Program Plan Intro

Assembly code for Conditional jump:

long absSum(long *start, long count)

start in %rdi, count in %rsi

absSum:

irmovq $8, %r8

irmovq $1, %r9

xorq %rax, %rax     

andq %rsi, %rsi

jmp test

loop:

mrmovq (%rdi),%r10

xorq %r11, %r11

subq %r10, %r11

jle pos

rrmovq %r11, %r10

pos:

addq %r10, %rax

addq %r8, %rdi

subq %r9, %rsi

test:

jne loop

ret

Assembly code for Conditional move:

long absSum(long *start, long count)

start in %rdi, count in %rsi

absSum:

irmovq $8, %r8

irmovq $1, %r9

xorq %rax, %rax     

andq %rsi, %rsi

jmp test

loop:

mrmovq (%rdi),%r10

xorq %r11, %r11

subq %r10, %r11

cmovg %r11, %r10

addq %r10, %rax

addq %r8, %rdi

subq %r9, %rsi

test:

jne loop

ret

Processing stages:

• The processing of an instruction has number of operations.
• The operations are organized into particular sequence of stages.
• It attempts to follow a uniform sequence for all instructions.
• The description of stages are shown below:
  • Fetch:
    • It uses program counter “PC” as memory address to read instruction bytes from memory.
    • The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.
    • It fetches “valC” that denotes an 8-byte constant.
    • It computes “valP” that denotes value of “PC” plus length of fetched instruction.
  • Decode:
    • The register file is been read with two operands.
    • It gives values “valA” and “valB” for operands.
    • It reads registers with instruction fields “rA” and “rB”.
  • Execute:
    • In this stage the ALU either performs required operation or increments and decrements stack pointer.
    • The resulting value is termed as “valE”.
    • The condition codes are evaluated and destination register is updated based on condition.
    • It determines whether branch should be taken or not in a jump instruction.
  • Memory:
    • The data is been written to memory or read from memory in this stage.
    •  The value that is read is determined as “valM”.
  • Write back:
    • The results are been written to register file.
    • It can write up to two results.
  • PC update:
    • The program counter “PC” denotes memory address to read bytes of instruction from memory.
    • It is used to set next instruction’s address.

C.

Program Plan Intro

Assembly code for Conditional jump:

long absSum(long *start, long count)

start in %rdi, count in %rsi

absSum:

irmovq $8, %r8

irmovq $1, %r9

xorq %rax, %rax     

andq %rsi, %rsi

jmp test

loop:

mrmovq (%rdi),%r10

xorq %r11, %r11

subq %r10, %r11

jle pos

rrmovq %r11, %r10

pos:

addq %r10, %rax

addq %r8, %rdi

subq %r9, %rsi

test:

jne loop

ret

Assembly code for Conditional move:

long absSum(long *start, long count)

start in %rdi, count in %rsi

absSum:

irmovq $8, %r8

irmovq $1, %r9

xorq %rax, %rax     

andq %rsi, %rsi

jmp test

loop:

mrmovq (%rdi),%r10

xorq %r11, %r11

subq %r10, %r11

cmovg %r11, %r10

addq %r10, %rax

addq %r8, %rdi

subq %r9, %rsi

test:

jne loop

ret

Processing stages:

• The processing of an instruction has number of operations.
• The operations are organized into particular sequence of stages.
• It attempts to follow a uniform sequence for all instructions.
• The description of stages are shown below:
  • Fetch:
    • It uses program counter “PC” as memory address to read instruction bytes from memory.
    • The 4-bit portions “icode” and “ifun” of specifier byte is extracted from instruction.
    • It fetches “valC” that denotes an 8-byte constant.
    • It computes “valP” that denotes value of “PC” plus length of fetched instruction.
  • Decode:
    • The register file is been read with two operands.
    • It gives values “valA” and “valB” for operands.
    • It reads registers with instruction fields “rA” and “rB”.
  • Execute:
    • In this stage the ALU either performs required operation or increments and decrements stack pointer.
    • The resulting value is termed as “valE”.
    • The condition codes are evaluated and destination register is updated based on condition.
    • It determines whether branch should be taken or not in a jump instruction.
  • Memory:
    • The data is been written to memory or read from memory in this stage.
    •  The value that is read is determined as “valM”.
  • Write back:
    • The results are been written to register file.
    • It can write up to two results.
  • PC update:
    • The program counter “PC” denotes memory address to read bytes of instruction from memory.
    • It is used to set next instruction’s address.