The following table shows the memory hierarchy for a 2 GHz processor with the following information: Memory Unit Name Access Speed L1 Cache 1 cycle L2 Cache 20 cycles Main Memory 200 cycles Part 1: What is AMAT on this machine (write your answer in terms of ns)? AMAT = ns Effective CPI = Cache Miss Rate 5% 2% None Part 2: Suppose a benchmark program consists of 20% of load and store instructions, what is the Effective CPI when you consider memory stall cycles? Suppose Base CPI = 1.

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The following table shows the memory hierarchy for a 2 GHz processor with the following
information:
Memory Unit Name
Access Speed
L1 Cache
1 cycle
L2 Cache
20 cycles
Main Memory
200 cycles
Part 1: What is AMAT on this machine (write your answer in terms of ns)?
AMAT=
ns
Effective CPI =
Cache Miss Rate
5%
2%
None
Part 2: Suppose a benchmark program consists of 20% of load and store instructions, what is the
Effective CPI when you consider memory stall cycles? Suppose Base CPI = 1.
Transcribed Image Text:The following table shows the memory hierarchy for a 2 GHz processor with the following information: Memory Unit Name Access Speed L1 Cache 1 cycle L2 Cache 20 cycles Main Memory 200 cycles Part 1: What is AMAT on this machine (write your answer in terms of ns)? AMAT= ns Effective CPI = Cache Miss Rate 5% 2% None Part 2: Suppose a benchmark program consists of 20% of load and store instructions, what is the Effective CPI when you consider memory stall cycles? Suppose Base CPI = 1.
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