Q3: The content of a four-bit register is initially the 4-bit word 0000. The register is shifted four times to the right, with the serial input being 1111. What is the content of the register after each shift? (10)
Q3: The content of a four-bit register is initially the 4-bit word 0000. The register is shifted four times to the right, with the serial input being 1111. What is the content of the register after each shift? (10)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Number 3 please
![Final Exam
EECE 3100: Design of Digital Logic System
Fall 2021
Date: 11/23/2021 (10:10 AM-12:10 PM(Sharp))
Name:
T#:
1
1.
alWrite down the Boolean function F in mìn-term canonical form (10)
)Minimize the function without dropping any steps (10)
limplement the circuit with basic gates. (5)
Q2: Draw the logic diagram of a four-bit register with four D flip-flops and four 4x1 multiplexers with a
mode selection input sand s. The register operates according to the following functional table (25)
Register Operation
Load Parallel Data
S1
So
Clear register to zero
Complement the output
No Change
1.
1
1
Q3: The content of a four-bit register is initially the 4-bit word 0000. The register is shifted four times to
the right, with the serial input being 1111. What is the content of the register after each shift? (10)
Q 4: Design a combinational circuit with three inputs and one output. The condition is: the output is 1
when the binary value of the inputs < 3, and the output is 0 otherwise. (20)
Q 5. Draw a logic diagram constructing a 3X8 decoder with active-high enable, using a pair of
2X4 decoders; draw a truth table for the configuration. (20)](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F439bee97-c383-4b6b-9436-2faa8e4741a7%2F5cbe13db-63eb-4fed-8cc3-ca7913a29270%2Flrccbxr_processed.jpeg&w=3840&q=75)
Transcribed Image Text:Final Exam
EECE 3100: Design of Digital Logic System
Fall 2021
Date: 11/23/2021 (10:10 AM-12:10 PM(Sharp))
Name:
T#:
1
1.
alWrite down the Boolean function F in mìn-term canonical form (10)
)Minimize the function without dropping any steps (10)
limplement the circuit with basic gates. (5)
Q2: Draw the logic diagram of a four-bit register with four D flip-flops and four 4x1 multiplexers with a
mode selection input sand s. The register operates according to the following functional table (25)
Register Operation
Load Parallel Data
S1
So
Clear register to zero
Complement the output
No Change
1.
1
1
Q3: The content of a four-bit register is initially the 4-bit word 0000. The register is shifted four times to
the right, with the serial input being 1111. What is the content of the register after each shift? (10)
Q 4: Design a combinational circuit with three inputs and one output. The condition is: the output is 1
when the binary value of the inputs < 3, and the output is 0 otherwise. (20)
Q 5. Draw a logic diagram constructing a 3X8 decoder with active-high enable, using a pair of
2X4 decoders; draw a truth table for the configuration. (20)
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