Please answer the following questions about the MIPS R2000 CPU. Each answer must be no more than 2 sentences long. a) Please write two example arithmetic instructions that require the ALU inside the R2000 CPU to be used b) Please write two example instructions that do not require the ALU inside the R2000 CPU to be used c) Please write two example instructions that take data from the RAM in main memory and place the data into a R2000 CPU register d) Please write two example instructions that take data from a R2000 CPU register and place the data into the RAM in main memory e) Please state the purpose of the PC inside a R2000 CPU

Please answer the following questions about the MIPS R2000 CPU. Each answer must be no more than 2 sentences long. a) Please write two example arithmetic instructions that require the ALU inside the R2000 CPU to be used b) Please write two example instructions that do not require the ALU inside the R2000 CPU to be used c) Please write two example instructions that take data from the RAM in main memory and place the data into a R2000 CPU register d) Please write two example instructions that take data from a R2000 CPU register and place the data into the RAM in main memory e) Please state the purpose of the PC inside a R2000 CPU

Name: Please answer the following questions about the MIPS R2000 CPU. Each a
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Description: Please answer the following questions about the MIPS R2000 CPU. Each answer must be no more than 2 sentences long.a) Please write two example arithmetic instructions that require the ALU inside the R2000 CPU to be usedb) Please write two example inst

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 10RQ: How does pipelining improve CPU efficiency? What’s the potential effect on pipelining’s efficiency...

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A(n) ________________ instruction always alters the instruction execution sequence. A(n) ______________ instruction alters the instruction execution sequence only if a specified Condition is true.
_____ is a CPU design technique in which instruction execution is divided into multiple stages and different instructions can execute in different stages simultaneously.
In the ________, memory addresses consist of a single integer.
How does pipelining improve CPU efficiency? What’s the potential effect on pipelining’s efficiency when executing a conditional BRANCH instruction? What techniques can be used to make pipelining more efficient when executing conditional BRANCH instructions?
The time it takes to perform the fetch instruction and decode instruction steps is called the execution time. True or false?
A problem-solving procedure that requires executing one or more comparison and branch instructions is called a(n) __________.
51. Fill in the table for the values in the registers and memory after the retą instruction is called: Ox100357: retą Srip Srsp ($rsp) Value before retą Ox218 Ox100357 Ox100349 Value after retą n/a
14
Given the structure of the CPU in the references section provide the control signals that implements the following instruction. SUB r3, r2, r1
ADDING AND SUBTRACTING The purpose of this assignment is to become familiar with the add and sub instructions. Addin' 'n Subtractin' 1. Assume the following values are stored at the indicated memory addresses and registers: Register %eax Address Value Value Ox500 ØX93FA1C9C Ox500 OXED Ox504 Ox7B %ebx Ox508 Ox79 %ecx Ox7 Ox50C OXF1 %edx OxA Fill in the following table, showing the effects of the indicated instructions, and showing what register (state the smallest unit that is affected) or memory location that would be changed and its new value. Also, show the OF and CF values AFTER the instruction executes. Assume each instruction is independent of the others. In other words, the initial conditions specified above hold for each of the instructions shown below. SHOW ALL VALUES IN HEXADECIMAL. What Changed? (list address or register) Instruction New Value (in hex) OF CF 1. subb $0xA, 12(%eax) 2. subb 8(%eax), %dl 3. addl %ebx, %ebx 4. addl %eсx, (%еаx) 5. addb %d1, 8(%eax) 6. subl %edx,…
7. For both of the instructions shown below, the initial conditions are shown. The result (which the instruction stores in r1) is also shown. For each instruction, answer these questions: • What is the state of the flags (NZCV) after the instruction executes • If the operands were signed, are the results valid? Why or why not? • If the operands were unsigned, are the results valid? Why or why not? a) initial conditions: r0 = 0xAAAA_AAAA rl=0x5555_5555 ADDS rl,rl,ro Result: r1=0xFFFF_FFFF b) initial conditions: r0=0x7FFF_FFFD r1 = 0x0000_000F ADDS rl,ro,r1 Result: r1=0x8000_000C
Design a memory for 16 bit microprocessor the memory should be 512*8 using 128*8 RAM and ROM.( your computer should have of RAM and ROM)?