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In this exercise, we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following LEGV8 instruction word: 0xf8014062.

In this exercise, we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following LEGV8 instruction word: 0xf8014062.

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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In this exercise, we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following LEGV8 instruction word: 0xf8014062.

 

 

4.5.1 [5] <$4.4> What are the outputs of the sign-extend and the "shift left 2" unit (near the top of Figure 4.23) for this instruction word? 4.5.2 (10] <$4.4> What are the values of the ALU control unit's inputs for this instruction? 4.5.3 [5] <$4.4> What is the new PC address after this instruction is executed? Highlight the path through which this value is determined.
Transcribed Image Text:4.5.1 [5] <$4.4> What are the outputs of the sign-extend and the "shift left 2" unit (near the top of Figure 4.23) for this instruction word? 4.5.2 (10] <$4.4> What are the values of the ALU control unit's inputs for this instruction? 4.5.3 [5] <$4.4> What is the new PC address after this instruction is executed? Highlight the path through which this value is determined.
4.5.4 (10] <$4.4> For each mux, show the values of its inputs and outputs during the execution of this instruction. List values that are register outputs at Reg [Xn]. 4.5.5 [10] <$4.4> What are the input values for the ALU and the two add units? 4.5.6 (10] <$4.4> What are the values of all inputs for the registers unit?
Transcribed Image Text:4.5.4 (10] <$4.4> For each mux, show the values of its inputs and outputs during the execution of this instruction. List values that are register outputs at Reg [Xn]. 4.5.5 [10] <$4.4> What are the input values for the ALU and the two add units? 4.5.6 (10] <$4.4> What are the values of all inputs for the registers unit?
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