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H.W.: Consider a hypothetical machine with two steps instruction cycle: fetch cycle and execute cycle. The characteristics of the machine is given in Figure 8 with the following explanation: • The processor contains a single data register, called an accumulator (AC). • Both instructions and data are 8 bits long. • The memory is organized using 8-bit words. • The instruction format provides 2 bits for the opcode, and up to 26 = 64 words of memory can be directly addressed. Opcode Address (a) Instruction format

H.W.: Consider a hypothetical machine with two steps instruction cycle: fetch cycle and execute cycle. The characteristics of the machine is given in Figure 8 with the following explanation: • The processor contains a single data register, called an accumulator (AC). • Both instructions and data are 8 bits long. • The memory is organized using 8-bit words. • The instruction format provides 2 bits for the opcode, and up to 26 = 64 words of memory can be directly addressed. Opcode Address (a) Instruction format

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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H.W.: Consider a hypothetical machine with two steps instruction cycle: fetch cycle and execute cycle. The characteristics of the machine is given in Figure 8 with the following explanation: The processor contains a single data register, called an accumulator (AC). • Both instructions and data are 8 bits long. • The memory is organized using 8-bit words. • The instruction format provides 2 bits for the opcode, and up to 26 = 64 words of memory can be directly addressed. Opcode Address (a) Instruction format Magnitude (b) Integer format Program counter (PC)= Address of instruction Instruction register (IR)- Instruction being executed Accumulator (AC) Temporary storage (c) Internal CPU registers -Load AC from memory Store AC to memory - Add to AC from memory (d) Partial list of opcodes Figure 8 Characteristics of a Hypothetical Machine Figure 9 illustrates a partial program execution, showing the relevant portions of memory and processor registers after the first instruction, 64H has been executed. The contents of memory and registers are in hexadecimal. Memory CPU registers 08 64 09 PC 09 AS 02 AC OA 25 64 IR 24 02 25 49 Figure 9 Contents of memory and registers in Hexadecimal after the execution of the first instruction a) Referring to the instruction format in Figure 8 (a), what does instruction 64H mean? b) Using Figure 9 as template, show the content of registers PC. AC, IR and memory after the second instruction, ASH has been executed. c) Using Figure 9 as template, show the content of registers PC, AC, IR and memory after the third instruction, 25H has been executed.
Transcribed Image Text:H.W.: Consider a hypothetical machine with two steps instruction cycle: fetch cycle and execute cycle. The characteristics of the machine is given in Figure 8 with the following explanation: The processor contains a single data register, called an accumulator (AC). • Both instructions and data are 8 bits long. • The memory is organized using 8-bit words. • The instruction format provides 2 bits for the opcode, and up to 26 = 64 words of memory can be directly addressed. Opcode Address (a) Instruction format Magnitude (b) Integer format Program counter (PC)= Address of instruction Instruction register (IR)- Instruction being executed Accumulator (AC) Temporary storage (c) Internal CPU registers -Load AC from memory Store AC to memory - Add to AC from memory (d) Partial list of opcodes Figure 8 Characteristics of a Hypothetical Machine Figure 9 illustrates a partial program execution, showing the relevant portions of memory and processor registers after the first instruction, 64H has been executed. The contents of memory and registers are in hexadecimal. Memory CPU registers 08 64 09 PC 09 AS 02 AC OA 25 64 IR 24 02 25 49 Figure 9 Contents of memory and registers in Hexadecimal after the execution of the first instruction a) Referring to the instruction format in Figure 8 (a), what does instruction 64H mean? b) Using Figure 9 as template, show the content of registers PC. AC, IR and memory after the second instruction, ASH has been executed. c) Using Figure 9 as template, show the content of registers PC, AC, IR and memory after the third instruction, 25H has been executed.
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