b) Consider a computer system with a total memory of 4GB and each memory block contains 4 words. The computer system is using a direct-mapped cache, where the memory address format for the cache mapping is given as follows: i) 14 bits r bits w bits Determine the total capacity of the cache from the memory address format

b) Consider a computer system with a total memory of 4GB and each memory block contains 4 words. The computer system is using a direct-mapped cache, where the memory address format for the cache mapping is given as follows: i) 14 bits r bits w bits Determine the total capacity of the cache from the memory address format

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Consider a 32 bit microprocessor that has on chip 32 K byte 4 way set associative cache. Block size of cache is two 32 bit words. The set number (in decimal) to which the word from memory location FAFEEBE1 wrapped.
For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to access the cache. a. What is the cache block size in words? b. How many entries does the cache have? Tag 31-13 Index 12-6 Offset 5-0
Suppose a computer using direct-mapped cache has 232 bytes of byte-addressable main memory and a cache size of 512 bytes, and each cache block contains 64 bytes.Q.) How many blocks of main memory are there?
4. Suppose a computer using a fully associative cache has 2^24 byte of byte-addressable main memory and a cache of 128 blocks, where each block contains 64 bytes. a) How big in kilobytes is main memory? b) How big in bytes is cache? In kilobytes? c) How many blocks of main memory are there? d) What is the format of a memory address as seen by the cache, i.e., what are the sizes of the tag and offset fields? e) To which cache block will the memory address 0x01D8729A map?
QUESTION 2 Suppose a computer using direct mapped cache is using 216 (64K) bytes of byte-addressable main memory, and a cache size of 4096 bytes, where each cache block contains 256 bytes. a) How many blocks of main memory are there? b) What is the format of a memory address as seen by cache, i.e. what are the length of the tag, block, and offset fields? c) Given memory address 2B9D (in hexadecimal format), which block in the cache will be searched? (What is that block's id?)
Exercise 1: Consider a word-addressable memory of 16 GB, where each word is composed of 128 bits. This memory is directly mapped to a cache of 1 MB composed of blocks where each block contains 16 words. a) What is length (in bits) of the address provided by the processor? b) What is the length (in Bytes) of one memory block? c) How many lines does the cache have? d) What is the length (in bits) of each of the TAG, LINE, and OFFSET? e) Which line in cache can hold the address 00000FOF?
Suppose a computer using fully associative cache has 224 bytes of byte-addressable main memory and a cache of 128 blocks, where each block contains 64 bytes.Q.) To which cache block will the memory address 0x01D872 map?
Suppose a computer using direct mapped cache has 224 bytes of byte- addressable main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. (Note: 64K = 26 * 210) a) How many blocks of main memory are there? b) What is the format of a memory address as seen by cache, i.e., what are the sizes of the tag, block, and offset fields?
Suppose a computer using fully associative cache has 224 words of main memory and a cache of 512 blocks, where each cache block contains 16 words. How many blocks of main memory are there? What is the format of a memory address as seen by the cache, i.e., what are the sizes of the tag and offset fields? To which cache block will the memory reference 17042416 map?
Suppose a computer using direct mapped cache has 2^24 bytes of byte- addressable main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. (Note: 64K = 26 * 210) a) How many blocks of main memory are there? b) What is the format of a memory address as seen by cache, i.e., what are the sizes of the tag, block, and offset fields?
Please do a,b,c,d, and e Consider a machine with a byte addressable main memory of Bytes and block size of 8 Bytes. Assume that a direct mapped cache consisting of 32 lines is used with this machine. a.How is a 16-bit memory address divided into tag, line number, and byte number? b.Into what line would Bytes with of the following address be stored? 0001- 0001- 0001- 1011 1100- 0011- 0011- 0100 1101- 0000- 0001- 1101 1010- 1010- 1010- 1010 c.Suppose the byte with address 0001 1010 0001 1010 is stored in the cache. What are the addresses of the other bytes stored along with it? d.How many total bytes of memory can be stored in the cache? e.Why is the tag also stored in the cache?
Memory system includes the elements: Main Memory=16 Mbytes, Cache=128Kbytes, Block= 8bytes. A) Design a direct-mapped cache memory system. (Draw the block diagram of the cache and mention on the diagram the values of: s, s+w, w, r, s-r) B) For the main memory addresses: 7AF9CD H show the following information, in hexadecimal format: a. Tag, Line, and Word values for a direct-mapped cache. b. Tag and Word values for an associative cache. c. Tag, Set, and Word values for a 4-way set associative cache.