a. What is 2PC? b. In what two ways could 2PC fail?
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- Your close friend has just invested in a brand new computer. How should you proceed? She says that the speed of her new system, 1GHz, is much higher than that of her old system, 300MHz. Just what do you see yourself telling her? (Here's a hint: consider the implications of Amdahl's Law.)What is the key difference between a DRAM storage cell and an FRAM storage cell? DRAM will hold its information when power is removed but FRAM will not. DRAM is too complex to be used in modern computers, so FRAM is becoming popular of late. DRAM uses a traditional capacitor while FRAM uses a Ferroelectric capacitor. Both use capacitors, but only FRAM can is random access.Your friend has just bought a new personal computer. She tells you that her new system runs at 1GHz, which makes it over three times faster than her old 300 MHz system. What would you tell her? By using a specific example case (e.g., In a given system, for 40% of its time the processor is busy with computation but for 60% of its time processor is idle waiting for the completion of I/O operations in disk and network devices), explain how Amdahl’s law can be applied
- Imagine you're constructing an embedded system on P2.1 that use timer 0 to generate a 70% duty cycle and timer 1 to generate a 30% off cycle. It will read data from P1 while also transferring data to a serial device. Describe if the system requires a real-time operating system.For the following figure, answer the questions below: 1. What is the size of address bus? 2. What is the function of RESET pin? 3. What is the benefit of BHE pin? 4. What is the function of HLDA pin? 5. What is the function of MN/MX pin? JUU GND 1 AD14 2 AD13 3 AD124 AD115 AD106 AD97 AD88 AD7 9 AD6 ADS 10 11 AD412 AD3 13 AD2 14 AD115 ADO 16 NMI 17 INTR 18 CLK 19 GND 20 8086 CPU MAX MIN MODE MODE 40 VCC 39 AD15 38 A16/S3 37 A17/S4 36 A18/S5 35 A19/S6 34 BHE/S7 33 MN/MX 32 RD 31 RO/GTO (HOLD) 30 RO/GT1 (HLDA) 29 LOCK (WR) 28 $2 (M/TŌ) 27) S1 (DT/R) 26 50 (DEN) 25 aso (ALE) 24 QS1 (INTA) 23 TEST 22 READY 21 RESETConsider a memory system with the following parameters: Tc = 100ns Cc = 0.01 cents/bit Tm = 1,200ns Cm = 0.001 cents/bit a. What is the cost of 1 MByte of main memory? b. What is the cost of 1 MByte of main memory using cache memory technology?
- Let's pretend you're programming an embedded system, and that you want P2.1 to operate at a 70% duty cycle and a 30% off cycle, respectively, using timer 0 and timer 1. Data is being read from P1 and sent to a serial device concurrently. Give your reasons for or against using a real-time OS in this scenario.Three OSI layers are covered in the X.25 standard? Explain?Let's pretend you're programming P2.1 of an embedded system to have a 70% duty cycle with timer 0 and a 30% off cycle with timer 1. It will receive information from P1 and send it to a serial device concurrently. Provide an explanation as to why a real-time operating system could be needed.
- 6. Examine the systems given below. System (a): 0.88 0.85 0.93 0.95 System (b): 0.95 0.93 0.85 0.83 0.85 a Which system is more reliable, a or b? (show your answer) b. If it costs $800 for each 83% reliable component, $950 for each 85% component, $1,000 for each 88% component, $1100 for each 93% reliable component, $1300 for each 95% reliable component and $7,550 to replace a failed system, which system would you choose, a or b?For Von Neumann architecture bottleneck, what are possible ways that the bottleneck can be reduced ?Which is the the best answer A. Increased the system memory speed. B. Expand the data path from CPU to system memory. C. A and B. D. None of the above.What is the logic behind 2PC? Explain how 2PC works, in your own words, and using a diagram. What two things can possibly go wrong (even) in 2PC?