A particular interconnection between two logic gates in an IC chip runs one-half the distance across a 10-mm-wide die. If the line is 1 m wide and the oxide (εr =3.9, ε0 =8.854 × 10−14 F/cm) beneath the line is 1 m thick, what is the total capacitance of this line, assuming that the capacitance is threetimes that predicted by the parallel plate capacitance formula? Assume that the silicon beneath the oxide represents a conducting ground plane.
A particular interconnection between two logic gates in an IC chip runs one-half the distance across a 10-mm-wide die. If the line is 1 m wide and the oxide (εr =3.9, ε0 =8.854 × 10−14 F/cm) beneath the line is 1 m thick, what is the total capacitance of this line, assuming that the capacitance is threetimes that predicted by the parallel plate capacitance formula? Assume that the silicon beneath the oxide represents a conducting ground plane.
Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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A particular interconnection between two logic gates in an IC chip runs one-half the distance across a 10-mm-wide die. If the line is 1 m wide and the oxide (εr =3.9, ε0 =8.854 × 10−14 F/cm) beneath the line is 1 m thick, what is the total capacitance of this line, assuming that the capacitance is three
times that predicted by the parallel plate capacitance formula? Assume that the silicon beneath the oxide represents a conducting ground plane.
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