6. An OPAMP-based series voltage regulator is shown in Fig. 11. The Zener diode D is modelled as a constant DC voltage source Vzк in series with a dynamic resistance r₂. The unregulated input voltage is VIN = VIN + Vin where vin is an unavoidable variation about the average value VIN. The output voltage is vOUT = VOUT + "out where VOUT is the desired DC output voltage and vout is an undesirable fluctuation in the output voltage. + R R₁ Vin VOUT D✈ VIN R2 Figure 11: OPAMP-based series voltage regulator. (a) Perform a DC analysis and show that the DC output voltage is T₂ VOUT R₁ + R2 R2 R R+rz ·Vzk + R+T VIN). (b) Perform an AC analysis and show that the small-signal voltage gain from input to output is given by Vout R₁ + R2 Tz Av Vin R₂ T: +R¨ (c) For this voltage regulator, what is the ideal value of A₂, and why is that so? (d) With reference to your answer in part (c), suggest a modification to the circuit that would improve the results in parts (a) and (b).

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6. An OPAMP-based series voltage regulator is shown in Fig. 11. The Zener diode D is modelled as
a constant DC voltage source Vzк in series with a dynamic resistance r₂.
The unregulated input voltage is VIN = VIN + Vin where vin is an unavoidable variation about the
average value VIN.
The output voltage is vOUT = VOUT + "out where VOUT is the desired DC output voltage and vout
is an undesirable fluctuation in the output voltage.
+
R
R₁
Vin
VOUT
D✈
VIN
R2
Figure 11: OPAMP-based series voltage regulator.
(a) Perform a DC analysis and show that the DC output voltage is
T₂
VOUT
R₁ + R2
R2
R
R+rz
·Vzk +
R+T VIN).
(b) Perform an AC analysis and show that the small-signal voltage gain from input to output is
given by
Vout R₁ + R2
Tz
Av
Vin
R₂
T: +R¨
(c) For this voltage regulator, what is the ideal value of A₂, and why is that so?
(d) With reference to your answer in part (c), suggest a modification to the circuit that would
improve the results in parts (a) and (b).
Transcribed Image Text:6. An OPAMP-based series voltage regulator is shown in Fig. 11. The Zener diode D is modelled as a constant DC voltage source Vzк in series with a dynamic resistance r₂. The unregulated input voltage is VIN = VIN + Vin where vin is an unavoidable variation about the average value VIN. The output voltage is vOUT = VOUT + "out where VOUT is the desired DC output voltage and vout is an undesirable fluctuation in the output voltage. + R R₁ Vin VOUT D✈ VIN R2 Figure 11: OPAMP-based series voltage regulator. (a) Perform a DC analysis and show that the DC output voltage is T₂ VOUT R₁ + R2 R2 R R+rz ·Vzk + R+T VIN). (b) Perform an AC analysis and show that the small-signal voltage gain from input to output is given by Vout R₁ + R2 Tz Av Vin R₂ T: +R¨ (c) For this voltage regulator, what is the ideal value of A₂, and why is that so? (d) With reference to your answer in part (c), suggest a modification to the circuit that would improve the results in parts (a) and (b).
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