4.6 Section 4.4 does not discuss I-type instructions like ADDI or ANDI. 4.6.1 What additional logic blocks, if any, are needed to add I-type instructions to the CPU shown in Figure 4.23? Add any necessary logic blocks to Figure 4.23 and explain their purpose. 4.6.2 List the values of the signals generated by the control unit for ADDI. Explain the reasoning for any “ don ’ t care ” control signals.
4.6 Section 4.4 does not discuss I-type instructions like ADDI or ANDI. 4.6.1 What additional logic blocks, if any, are needed to add I-type instructions to the CPU shown in Figure 4.23? Add any necessary logic blocks to Figure 4.23 and explain their purpose. 4.6.2 List the values of the signals generated by the control unit for ADDI. Explain the reasoning for any “ don ’ t care ” control signals.
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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- 4.6 Section 4.4 does not discuss I-type instructions like ADDI or ANDI.
- 4.6.1 What additional logic blocks, if any, are needed to add I-type instructions to the CPU shown in Figure 4.23? Add any necessary logic blocks to Figure 4.23 and explain their purpose.
- 4.6.2 List the values of the signals generated by the control unit for ADDI. Explain the reasoning for any “ don ’ t care ” control signals.
![Add
ALU
Add e
Shift
Reg2Loc
Uncondbranch
Branch
left 2.
MemRead
MemtoReg
ALUOP
MemWnte
ALUS
RegWrite
Instruction [31-21]
Control
Instruction [9-5]
Read
Read
PC
Instruction (20-16
regster 1
Read
address
data 1
Read
register 2
Zero
Instruction
ALU ALU
(31-01
Read
data 2
Read
data
Write
Address
result
Instruction
Instruction 4-0
register
memory
Wnite
data Registers
Data
Write
data memory
Instruction [31-0
32
64
Sign-
ALU
extend
control
Instruction (31-21]](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Ff4c64365-c4e1-4f88-8d65-6e06c7ab8bcb%2Ffec7ac79-301f-4bde-92a0-2bdadc17b608%2Fqvm7a7_processed.png&w=3840&q=75)
Transcribed Image Text:Add
ALU
Add e
Shift
Reg2Loc
Uncondbranch
Branch
left 2.
MemRead
MemtoReg
ALUOP
MemWnte
ALUS
RegWrite
Instruction [31-21]
Control
Instruction [9-5]
Read
Read
PC
Instruction (20-16
regster 1
Read
address
data 1
Read
register 2
Zero
Instruction
ALU ALU
(31-01
Read
data 2
Read
data
Write
Address
result
Instruction
Instruction 4-0
register
memory
Wnite
data Registers
Data
Write
data memory
Instruction [31-0
32
64
Sign-
ALU
extend
control
Instruction (31-21]
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