3. Section 4.4 does not discuss I-type instructions like addi or andi. (a) What additional logic blocks, if any, are needed to add I-type instructions to the CPU shown in Figure 4.21? Add any necessary logic blocks to Figure 4.21 and explain their purpose. (b) List the values of the signals generated by the control unit for addi. Explain the reasoning for any "don't care" control signals. The following is Figure 4.21 (b) diagra Add 4-> Add ALU result 1 RegDst Shift left 2 Branch MemRead Instruction [31-26] MemtoReg Control ALUOP MemWrite ALUSrc RegWrite Instruction [25-21] Read PC Read address register 1 Read Instruction [20-16] data 1 Read Instruction [31-0] register 2 M Write Read data 2 Instruction Instruction (15-11] register memory xx Zero ALU ALU Read Address result data Write data Registers Write Data data memory Instruction [15-0] 16 32 Sign- extend ALU control Instruction [5-01 4

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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Please help me with this computer architecture homework
3. Section 4.4 does not discuss I-type instructions like addi or andi.
(a) What additional logic blocks, if any, are needed to add I-type instructions to the CPU
shown in Figure 4.21? Add any necessary logic blocks to Figure 4.21 and explain their
purpose.
(b) List the values of the signals generated by the control unit for addi. Explain the reasoning
for any "don't care" control signals.
The following is Figure 4.21
(b)
diagra
Add
4->
Add
ALU
result
1
RegDst
Shift
left 2
Branch
MemRead
Instruction [31-26]
MemtoReg
Control
ALUOP
MemWrite
ALUSrc
RegWrite
Instruction [25-21]
Read
PC
Read
address
register 1 Read
Instruction [20-16]
data 1
Read
Instruction
[31-0]
register 2
M
Write
Read
data 2
Instruction
Instruction (15-11]
register
memory
xx
Zero
ALU
ALU
Read
Address
result
data
Write
data Registers
Write
Data
data memory
Instruction [15-0]
16
32
Sign-
extend
ALU
control
Instruction [5-01
4
Transcribed Image Text:3. Section 4.4 does not discuss I-type instructions like addi or andi. (a) What additional logic blocks, if any, are needed to add I-type instructions to the CPU shown in Figure 4.21? Add any necessary logic blocks to Figure 4.21 and explain their purpose. (b) List the values of the signals generated by the control unit for addi. Explain the reasoning for any "don't care" control signals. The following is Figure 4.21 (b) diagra Add 4-> Add ALU result 1 RegDst Shift left 2 Branch MemRead Instruction [31-26] MemtoReg Control ALUOP MemWrite ALUSrc RegWrite Instruction [25-21] Read PC Read address register 1 Read Instruction [20-16] data 1 Read Instruction [31-0] register 2 M Write Read data 2 Instruction Instruction (15-11] register memory xx Zero ALU ALU Read Address result data Write data Registers Write Data data memory Instruction [15-0] 16 32 Sign- extend ALU control Instruction [5-01 4
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