4. ARM Data Addressing. Suppose r0-0x8000, and the memory layout is as follows Address 0x8000 Data 0x1A 0x8001 0x2E 0x8002 0x2B 0x8003 OxOD 0x8004 0xFC 0x8005 0xA3 0x8006 0xCD 0x8007 0xE9 ii. ARM processors can be configured as big-endianness or little-endianness. What is the value of rl after running LDR r1, [ro]? (2) a. b. If little-endianness, rl = If big-endianness, rl= Suppose the system is based on little-endianness. What are the values of r1 and r0 is these instructions are executed separately? (3) LDR r1,[r0,#4] r0= rl= LDR r1,[r0],#4 r0= r1 = LDR r1,[r0,#4]! r0= rl= =
4. ARM Data Addressing. Suppose r0-0x8000, and the memory layout is as follows Address 0x8000 Data 0x1A 0x8001 0x2E 0x8002 0x2B 0x8003 OxOD 0x8004 0xFC 0x8005 0xA3 0x8006 0xCD 0x8007 0xE9 ii. ARM processors can be configured as big-endianness or little-endianness. What is the value of rl after running LDR r1, [ro]? (2) a. b. If little-endianness, rl = If big-endianness, rl= Suppose the system is based on little-endianness. What are the values of r1 and r0 is these instructions are executed separately? (3) LDR r1,[r0,#4] r0= rl= LDR r1,[r0],#4 r0= r1 = LDR r1,[r0,#4]! r0= rl= =
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![4. ARM Data Addressing. Suppose r0-0x8000, and the memory layout is as follows
Address
0x8000
Data
0x1A
0x8001
0x2E
0x8002
0x2B
0x8003
OxOD
0x8004
0xFC
0x8005
0xA3
0x8006
0xCD
0x8007
0xE9
ii.
ARM processors can be configured as big-endianness or little-endianness. What is the
value of rl after running LDR r1, [ro]? (2)
a.
b.
If little-endianness, rl =
If big-endianness, rl=
Suppose the system is based on little-endianness. What are the values of r1 and r0 is
these instructions are executed separately? (3)
LDR r1,[r0,#4]
r0=
rl=
LDR r1,[r0],#4
r0=
r1 =
LDR r1,[r0,#4]!
r0=
rl=
=](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F5b55a0fb-5dff-4587-97c0-c3ec381e9c7e%2Ffc645e60-6258-47a9-9b19-d87997a17e1d%2Fn8x4otu_processed.png&w=3840&q=75)
Transcribed Image Text:4. ARM Data Addressing. Suppose r0-0x8000, and the memory layout is as follows
Address
0x8000
Data
0x1A
0x8001
0x2E
0x8002
0x2B
0x8003
OxOD
0x8004
0xFC
0x8005
0xA3
0x8006
0xCD
0x8007
0xE9
ii.
ARM processors can be configured as big-endianness or little-endianness. What is the
value of rl after running LDR r1, [ro]? (2)
a.
b.
If little-endianness, rl =
If big-endianness, rl=
Suppose the system is based on little-endianness. What are the values of r1 and r0 is
these instructions are executed separately? (3)
LDR r1,[r0,#4]
r0=
rl=
LDR r1,[r0],#4
r0=
r1 =
LDR r1,[r0,#4]!
r0=
rl=
=
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