3) Suppose we have a computer that uses a memory address word size of 8 bits. This computer has a 16- byte cache with 4 bytes per block. The computer accesses a number of memory locations throughout the course of running a program. Suppose this computer uses direct-mapped cache. The format of a memory address as seen by the cache is shown below: Tag 4 bits Block 2 bits Offset 2 bits The system accesses memory addresses in this exact order: 0x6E, 0xB9, 0x17, 0xE0, 0x4E, 0x4F, 0x50, 0x91, 0xA8, 0xA9, 0xAB, 0xAD, 0x93, and 0x94. Fill out the following tables: a) Address Hit Reference or Miss Comments b) Show the final contents of cache for direct addressing: Block Cache Contents Tag (represented by address)

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter6: System Integration And Performance
Section: Chapter Questions
Problem 22VE
icon
Related questions
Question
3) Suppose we have a computer that uses a memory address word size of 8 bits. This computer has a 16-
byte cache with 4 bytes per block. The computer accesses a number of memory locations throughout
the course of running a program. Suppose this computer uses direct-mapped cache. The format of a
memory address as seen by the cache is shown below:
Tag
4 bits
Block
2 bits
Offset
2 bits
The system accesses memory addresses in this exact order: 0x6E, 0xB9, 0x17, 0xE0, 0x4E, 0x4F, 0x50,
0x91, 0xA8, 0xA9, 0xAB, 0xAD, 0x93, and 0x94. Fill out the following tables:
a)
Address
Hit
Reference or
Miss
Comments
b) Show the final contents of cache for direct addressing:
Block
Cache Contents
Tag
(represented by address)
Transcribed Image Text:3) Suppose we have a computer that uses a memory address word size of 8 bits. This computer has a 16- byte cache with 4 bytes per block. The computer accesses a number of memory locations throughout the course of running a program. Suppose this computer uses direct-mapped cache. The format of a memory address as seen by the cache is shown below: Tag 4 bits Block 2 bits Offset 2 bits The system accesses memory addresses in this exact order: 0x6E, 0xB9, 0x17, 0xE0, 0x4E, 0x4F, 0x50, 0x91, 0xA8, 0xA9, 0xAB, 0xAD, 0x93, and 0x94. Fill out the following tables: a) Address Hit Reference or Miss Comments b) Show the final contents of cache for direct addressing: Block Cache Contents Tag (represented by address)
Expert Solution
trending now

Trending now

This is a popular solution!

steps

Step by step

Solved in 2 steps

Blurred answer
Similar questions
Recommended textbooks for you
Systems Architecture
Systems Architecture
Computer Science
ISBN:
9781305080195
Author:
Stephen D. Burd
Publisher:
Cengage Learning
C++ for Engineers and Scientists
C++ for Engineers and Scientists
Computer Science
ISBN:
9781133187844
Author:
Bronson, Gary J.
Publisher:
Course Technology Ptr
Principles of Information Systems (MindTap Course…
Principles of Information Systems (MindTap Course…
Computer Science
ISBN:
9781305971776
Author:
Ralph Stair, George Reynolds
Publisher:
Cengage Learning
Enhanced Discovering Computers 2017 (Shelly Cashm…
Enhanced Discovering Computers 2017 (Shelly Cashm…
Computer Science
ISBN:
9781305657458
Author:
Misty E. Vermaat, Susan L. Sebok, Steven M. Freund, Mark Frydenberg, Jennifer T. Campbell
Publisher:
Cengage Learning
Operations Research : Applications and Algorithms
Operations Research : Applications and Algorithms
Computer Science
ISBN:
9780534380588
Author:
Wayne L. Winston
Publisher:
Brooks Cole
Fundamentals of Information Systems
Fundamentals of Information Systems
Computer Science
ISBN:
9781337097536
Author:
Ralph Stair, George Reynolds
Publisher:
Cengage Learning