2. Latch/FF/register design. (a) Design a SR-latch with enable using a D-latch and gates. (b) Design a D-latch using an SR-latch and gates.
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- B6Q2) A) Express the decimal number (- 30 ) as an 8-bit number in 2's complement form, and verifying its decimal value. B) Design an Octal-to-Binary (8-to-3) Encoder, and then draw a block diagram for Octal-to- Binary Encoder.parity generator design, construct and test a circuit that generates an even parity bit ffrom four messages bits . use XOR gates. adding one more XOR gate, expand the circuit so that it generates an odd parity bit also.
- Design a combinational circuit that takes 3-bit pattern as input and outputs binary code of bit position of the first 1' in the pattern reading from MSB (2nd position) to LSB (0th position).An additional output variable V is required along with binary code to indicate that the binary code is valid or note i.e., if the input pattern is '000' then the output V should be '0' to indicate that the binary code is not indicating the bit position of first 1' and we don't care about the binary code if V = 0. Design the required circuit using dual 4x1 MUXS and minimum additional logic.Available resources along with dual 4x1 MUXS are NOT gates, 2-input(AND, OR, NAND, NOR) gates.The upper 16 -bit binary count value are displayed on the four seven -segemnt displays as four hexadecimal digits. Hexadecimal values aren't good for human perception. How would you suggest the counter design be modified so that only decimal count values are displayed.Q4) Design a Register File which includes four 2-bit registers (In total, it includes 8 bits). Each register is named as ala0, b1b0, c2c0, d1d0. Registers are loaded from the S input. In addition to that, there are two input signals, X and Y, to determine which register to select (ie. 00 selectsfirst register ala0 etc). Also there is R signal. When W is zero, the content of the register does not change. When the W is 1 the selected register is loaded with a new value by shifting from the S input. Design this register file by using D flip-flops.