ISE218.02_HW4
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Dec 6, 2023
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ISE 218: Fundamentals of Information Technology
Stony Brook University
Homework #4
Fall 2023
Assignment Due: Oct 09, 2023
1.
Show how the value 0x29AB01 would be stored by byte-addressable machines
with 32-bit integers, using little endian and then big-endian format. Assume the
value starts at address 00
Little endian:
Address 00: 0x01
Address 01: 0xAB
Address 10: 0x29
Address 11: 0x00
Big endian:
Address 00: 0x00
Address 01: 0x29
Address 10: 0xAB
Address 11: 0x01
2.
What is instruction pipeline and explain reasons for instruction pipeline may stall?
- Instruction Pipeline is a technique that can execute smaller steps of the fetch-
decode-execute cycle in parallel to increase throughput. An instruction pipeline
may stall for the following reasons:
a. Resource conflicts
: two instructions want to access memory at the same time
b. Data dependencies:
an instruction needs to read a value from a register but the
value hasn’t been written yet by some previous instruction that hasn’t finished
executing yet
c. Conditional branching:
program changes order of execution of its instructions
3.
A computer has a memory unit with 16 bits per word. The instruction set consists
of 135 different operations. And has 32 general-purpose registers. Instructions
have an opcode part, and two address parts. Each instruction is stored in one
word of memory. How many bits are needed to specify a memory address?
16 - 8 = 8 8/2 = 4
- 4 bits
4.
For the instruction LOAD 700, what value is loaded into the accumulator for each
addressing mode? Memory:
Address Contents
0x700 0x800 …
0x800 0x200 …
0x1000 0x500 …
0x1100 0x700…
0x1200 0x800 …
0x1300 0x900 …
0x1500 0x1000
Immediate addressing mode
- 0x700
Direct addressing mode
- 0x800
Indirect addressing mode
- 0x200
5.
A computer has a memory unit with 32 bits per word and has 16 general-purpose
registers. The instruction set consists of 251 different operations. Some
instructions have an opcode part, an address part, and a register part. Other
instructions have an opcode part, and two address parts. Each instruction is
stored in one word of memory.
Explain how to determine the opcode number of bits and explain how many bits
are needed to specify a memory address?
- The smallest power of 2 that is greater than or equal to 251 is 256, which is 2^8.
8 bits are needed for the opcode.
- 32 - 8 = 24 bits for memory addresses. Since some instructions require two
memory addresses, 24/2 = 12 bits per address.
6.
A non-pipelined system takes 200 ns to process a task. The same task can be
processed in a 4-segment pipeline with a clock cycle of 10 ns. Determine the
speedup ratio of the pipeline for 200 tasks. Give your answer to two decimal
places of accuracy to the right of the decimal point.
- 200 * 200 = 40,000 ns. (200 + 4 - 1) * 10 ns = 2,030 ns
40,000/2,030 = approx. 19.70
19.70
7.
Assume a computer that has 32-bit integers. Show how each of the following
values would be stored sequentially in memory, starting at address 0x100,
assuming each address holds one byte. Be sure to extend each value to the
appropriate number of bits. You will need to add more rows (addresses) to store
all five values.
Big Endian:
0xB123456C:
0x100: 0xB1
0x101: 0x23
0x102: 0x45
0x103: 0x6C
0x2BF876:
0x104: 0x00
0x105: 0x2B
0x106: 0xF8
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0x107: 0x76
0x8B0:
0x108: 0x00
0x109: 0x00
0x10A: 0x08
0x10B: 0xB0
0x1101:
0x10C: 0x00
0x10D: 0x00
0x10E: 0x11
0x10F: 0x01
0xFEDC12:
0x110: 0x00
0x111: 0xFE
0x112: 0xDC
0x113: 0x12
Small Endian:
0xB123456C:
0x100: 0x6C
0x101: 0x45
0x102: 0x23
0x103: 0xB1
0x2BF876:
0x104: 0x76
0x105: 0xF8
0x106: 0x2B
0x107: 0x00
0x8B0:
0x108: 0xB0
0x109: 0x08
0x10A: 0x00
0x10B: 0x00
0x1101:
0x10C: 0x01
0x10D: 0x11
0x10E: 0x00
0x10F: 0x00
0xFEDC12:
0x110: 0x12
0x111: 0xDC
0x112: 0xFE
0x113: 0x00