HW#2-F2023
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Dec 6, 2023
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1
EECS 414
Introduction to MEMS
Fall 2023
Reading Assignments
•
Class Handouts and Notes, “Review of Standard Microfabrication Technologies”,
“Introduction to Semiconductors”
Homework #2
Total: 140 Points
Handed Out:
Thursday Sept. 7, 2023
Due:
Thursday Sept. 14, 2023 @ 9 pm
1.
Thermal and e-beam evaporation techniques have been used to deposit thin films of different
materials.
However, e-beam is more commonly used.
Why?
Provide short answer.
5 points
2.
Assume a transistor with its associated interconnect wires occupies an area the size of a small
square that is 0.5µm on a side.
Approximately how many of these transistors can be fabrictaed
on an 8” diameter silicon wafer?
5 points
.
3.
It has been said that silicon dioxide cannot be grown to a thickness much larger than about 1-
2µm.
Briefly explain why?
5 points
4.
Briefly explain what is photoresist, how it can be deposited onto a silicon wafer, what is the
typical thickness when deposited, and how it can be patterned after deposition?
10 points
5.
Evaporation is used to deposit a variety of materials.
This process is typically performed under
low-pressure, or vacuum conditions.
Briefly explain why?
5 points
6.
Name two advantages of sputtering over e-beam evaporation?
5 points
7.
Photolithography forms the foundation for IC manufacturing.
Name three reasons why?
5 points
8.
Introducing impurities into silicon can be done using a number of different techniques.
Circle
any of the following process steps that would be required in any of these techniques. Please
circle all the answers that you think are correct:
5 points
a)
Ion implantation
b)
High temperature annealing
c)
LPCVD deposition
d)
Thermal evaporation
e)
Pre-deposition
f)
All of the above
2
9.
Thin films can be formed on top of wafers using a number of techniques. Which one of the
techniques listed below requires a deposition temperature for the device wafer of more than
200°C (circle all that apply):
5 points
a)
PECVD
b)
Ion Beam Deposition
c)
Impurity Diffusion
d)
LPCVD
e)
Thermal Evaporation
f)
Sputtering
10.
Which of the following materials are electrically insulating (circle all that apply):
5 points
a)
Doped polysilicon
b)
Sputtered aluminum
c)
LPCVD silicon oxide
d)
Doped silicon nitride
e)
Undoped silicon
11.
Aluminum can be easily deposited using which of the following techniques, (circle all that
apply):
5 points
a)
Thermal evaporation
b)
E-beam evaporation
c)
Sputtering
d)
LPCVD
e)
PECVD
f)
Ion beam deposition
12.
The cross section of a device designed for fabrication using standard semiconductor techniques
is shown below.
The different layers are labeled.
Can this device be fabricated with the layers
as shown?
If not, specify all the problems and explain why these are problems?
20 points
Si
PECVD
Oxide
Photoresist
Polysilicon
Thermal Oxide
Nitride
Aluminum
3
13.
The cross section of a device is shown in the figure below.
(a) Describe all the processing
steps that should be carried out to produce the following cross section?
(b) The wafer
containing this device is immersed in a solution of buffered hydrofluoric acid (BHF) for a long
time.
Draw the cross section of the device after this etch is completed.
20 points
14.
A silicon wafer is subjected to the following process steps.
Please provide a cross section of
the wafer after EACH of these process steps in sequence (assume films are deposited only on
the top side of the wafer), and show the thicknesses of any layers on the wafer:
20 points
a-
A (100) wafer is placed inside a furnace and subjected to a moisture environment at a
temperature of 1100°C for 100 minutes;
b-
The wafer is placed inside a bath of BHF for 1 minute;
c-
The wafer is placed inside an LPCVD furnace at about 900°C with the following gasses
passing through the furnace: SiH4 and N2 as carrier gas (assume that whatever film is
deposited is 1µm thick);
d-
The wafer is placed inside a a furnace and subjected to a dry environment at a temperature
of 1000°C for 100 minutes;
15.
Silicon is doped with Phosphorus of 2x10
17
/cm
3
. What are the free carriers: electrons or holes?
What is carrier mobility? Now you dope the silicon with two dopants: Phosphorous at
5x10
17
/cm
3
and Boron at 3x10
17
/cm
3
. What are the free carriers, electrons or holes? What will
be the mobility of this compensated semiconductor? How much is the mobility reduced by
introducing excess dopants?
20 points
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