Lab 1- CEG2136

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2136

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Electrical Engineering

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Jan 9, 2024

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Lab #1: Introduction To Quartus II Design Software CEG2136 A03 - Computer Architecture I Fall 2023 Course Coordinator: Dr Voicu Groza Teaching assistant (TA): Bidisha Group 14 Jenny Farag - 300299753 Bwen Kayembe Entus - 300300868 Experiment date: September 21 2023 Submission date: September 25 2023 1
Theoretical Part: Introduction: This lab is focused on the basics of using the Quartus II Software system and familiarizing ourselves with it as it is how we will be implementing basic logic circuits and designing different logic diagrams to Altera digital system. It is crucial to understand how to perform a series of operations under this software, not only for this lab session, but for the many to come. It is equally important for future digital system designs. To conclude, this lab is important. It is the base foundation of the other labs. Objectives: Understand the basics of the Altera environment Design a simple logic circuit and capture its logic diagram using the Graphic Editor. Compile, simulate, debug, and test their design Download and run their design on the Altera DE2-115 board to experimentally verify the circuit Problem: This lab introduces Altera Quartus II by creating a simple circuit (Figure 1) using the graphic editor. The outputs will be simulated, and the results will be compared to the truth table that was previously established. The circuit will then be tested after being uploaded to the Altera DE2-115 board. Also, this lab requires us to build a complete adder and test it on the board. It will test us by analyzing how we implement the entire adder both theoretically and experimentally. Figure 1: Logic circuit with AND,Or and Exclusive-Or gates 2
Solution: To solve the problem, we will analyze into depth the figure given to us. Looking deeply into the 3 inputs (A, B and Cin) and the 2 outputs( S, Cout)The requirements that follow must be met in order to properly construct and test this circuit: a truth table derived from the logic expression, Quartus II software, and the Altera DE2-115 board. An AND, OR, Exclusive-OR gate, together with three input pins and two output pins, will be utilized to construct the circuit using the Quartus II graphic editor. Design: 1.Design presentation: Table 1: Truth table of Figure 1 A (input) B (input) Cin (input) S (output) Cout (output) 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 The truth table from our pre lab (in appendix) and the simulation output are the identical. We can then confirm that the experimental data and theoretical data are the same. 2. Components used: During this lab very few components were used, they are the following: Altera Quartus II Altera DE2-115 board 3
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Figure 2:Screenshot of the logic diagram with name pins 3. Solution: 4
Figure 3: Altera DE2-115 board, and its outputs when A,B, and C’s inputs are all 1. This figure highlights how once we put all the inputs (A,B and C) as 1, like it shows in our truth table, the output is “1, 1” just like how it is in our truth table. This demonstrates not only that our logic diagram responds well to the altera board, but it equally shows how the board has the same outputs as our truth table, allowing us to know that we are correct. 4. Challenging problems: During any lab there will always be a sort of challenge that individuals are likely to face. During our first lab, we have encountered a problem with getting our Altera board to work properly. It was a challenge since we had to restart the board multiple times and this has taken such a long time of waiting and hoping that the board will eventually work. Also, we had another minor problem with assigning the correct pins, after many tries and re reading the instructions we were able to figure out how to solve it without the help of the TA. Perhaps, after trying multiple times to run the board we had to get the TA to help us to solve such a problem. Simulation and Verification: Figure 4: Waveform of the simulation This was the waveform that we have obtained that shows that the simulation results match the truth table from the design part. In fact, the theoretical and experimental results match up the experiment circuit design portion. Discussion & Conclusions: 5
This lab, which is based on the ITI 1100 course, is intended to cover the fundamental concepts of logic circuit design using Quartus II software. This lab was a reminder to Quartus. However, we still need to be on the lookout for any mistakes like compilation errors or software malfunctions while doing the experiment. We did experience a bit of trouble when using the Altera board, and had to restart it a couple of times to make it work. In order to prevent those problems from occurring in the upcoming experiment, we must double-check each stage of the process and ensure that the file is stored in the proper spot. Overall, no significant setback during the lab. This lab has served its purpose by updating our Quartus knowledge and preparing us for the upcoming labs. 6
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Appendix (pre lab) Jenny Farag’s prelab 7
Bwen Kayembe Entus’ prelab 8