b) Use the ALU 74181 in the figure below and the tables (one is enough; second maybe, need to check the new kit) to implement : A + B, A – B, A. B. (MS) (LS) (MSB) I FO Cn4 s2 U14 15 S1 14 se 3 82 81 B0 M 23 22 (MSB) (LSBMSB) (LSB) And given that under M = 1 the circuit performs the following arithmetic and logic functions according to Table 11.1. Input selection $3 M-H Cn-L. Output F3 F2 SI FI FO A -A --B A&B A-B AB A(-B) (-A)B (-A)»(-B)| ACTIVE HIGH DATA SELECTION M-H M-L: ARITHMETIC OPERATIONS LOGIC sa sa s1 Ino carry with cary FUNCTIONS F.A F-APLUSI F-LA BI PLUS 1 F-LAB PLUS 1 LLLH FAT F-MINUS I (2 COMPLI FA PLUS A F-IA BI PLUS A LL F-ZERO FA PLUS AT PLUS 1 F-LA BI PLUS AT PLUS1 FA MINUS FAT LHLL LHLH LH F-A MINUS B MINUS 1 LHH H FA MINUS 1 F-APLUS AB LL FA PLUS AB PLUS 1 HLLH FAO FA PLUS B FA PLUS B PLUS 1 F-LA + PLUS AB F-AB MINUS I F-A PLUS A FLA BI PLUS A FLA PLUSA HL F-LA PLUS AB PLUS 1 FAB FAB FAPLUS A PLUS1 F-LA BI PLUS A PLUS 1 F-LA PLUSA PLUS I F.A HH LL FA F.A FAMINUS1 Table 11.1
b) Use the ALU 74181 in the figure below and the tables (one is enough; second maybe, need to check the new kit) to implement : A + B, A – B, A. B. (MS) (LS) (MSB) I FO Cn4 s2 U14 15 S1 14 se 3 82 81 B0 M 23 22 (MSB) (LSBMSB) (LSB) And given that under M = 1 the circuit performs the following arithmetic and logic functions according to Table 11.1. Input selection $3 M-H Cn-L. Output F3 F2 SI FI FO A -A --B A&B A-B AB A(-B) (-A)B (-A)»(-B)| ACTIVE HIGH DATA SELECTION M-H M-L: ARITHMETIC OPERATIONS LOGIC sa sa s1 Ino carry with cary FUNCTIONS F.A F-APLUSI F-LA BI PLUS 1 F-LAB PLUS 1 LLLH FAT F-MINUS I (2 COMPLI FA PLUS A F-IA BI PLUS A LL F-ZERO FA PLUS AT PLUS 1 F-LA BI PLUS AT PLUS1 FA MINUS FAT LHLL LHLH LH F-A MINUS B MINUS 1 LHH H FA MINUS 1 F-APLUS AB LL FA PLUS AB PLUS 1 HLLH FAO FA PLUS B FA PLUS B PLUS 1 F-LA + PLUS AB F-AB MINUS I F-A PLUS A FLA BI PLUS A FLA PLUSA HL F-LA PLUS AB PLUS 1 FAB FAB FAPLUS A PLUS1 F-LA BI PLUS A PLUS 1 F-LA PLUSA PLUS I F.A HH LL FA F.A FAMINUS1 Table 11.1
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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
Transcribed Image Text:b) Use the ALU 74181 in the figure below and the tables (one is enough; second maybe, need
to check the new kit) to implement : A + B, A – B, A. B.
(MSB)
(LSB)
10
(MSB)
F3 F2 F1 FO
S3
Cn+4
16
s2
20
U14
15
S1
14
so
A3 A2 A1 AO B3 B2 B1 B0 M Cn
24 23 22 21 28 27 T26 25
(LSB)
(MSB)
(LSB)(MSB)
(LSB)
And given that under M = 1 the circuit performs the following arithmetic and logic functions
according to Table 11.1.
Input selection
S3
Output
M-H
S2
SI
Cn=L.
F3
F2
F1
FO
A
1
-A
В
-B
A&B
AxB
1
A'B
1
Ax(-B)
(-A)xB
(-A)x(-B)
1
1
ACTIVE HIGH DATA
M-L: ARITHMETIC OPERATIONS
SELECTION
M-H
LOGIC
s3 s2 s1
so
Ino carry)
(with carry)
F-A PLUS 1
F- LA + B) PLUS 1
F- (A + BI PLUS 1
FUNCTIONS
L
L
F-A
F-A+B
F-AB
F-A
H
FA+B
F-A+T
F- MINUS 1 12s COMPL)
F-A PLUS AB
F- IA + BI PLUS AB
L
L
L
L
F-0
F-ZERO
F- AB
F-A PLUS AB PLUS 1
F- (A + BI PLUS AB PLUS 1
L
L
L
H
L
F-AOB
F- AB
L
L
F-A MINUS B MINUS 1
F-A MINUS B
F- AB MINUS 1
F- A
F-A PLUS AB PLUS1
F-A PLUS B PLUS 1
F- IA + B PLUS AB PLUS 1
L
H
L
F-A PLUS AB
FAOB
F-A PLUS B
F- IA +BI PLUS AB
F- AB MINUS 1
F- A PLUS A
F- LA + B) PLUS A
F-LA + B) PLUS A
F-A MINUS1
L
F-B
HL
H
F- AB
FAB
F-A PLUS A PLUS 1
F- IA + B) PLUS A PLUS 1
F- LA + B) PLUS A PLUS 1
H
F-1
H
H
L
FA+E
H
H
L.
F-A+B
H
H
F-A
F-A
Table 11.1
---
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