Lab report 3 Elec 2607

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Apr 3, 2024

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Lab 3 ELEC2607 Jeff Hansen 101197428 Lab Section: L3 (8:30 - 11:30AM)

1.0 Introduction The focus of this laboratory was to mimic the T-bird tail-light control design using a complex programmable logic device (CPLD). The completed circuit’s function was to output different types of combinations for the T-bird tail-lights, with different input signals providing different output combinations. The circuit was made from a left, right and brake signal functions, with the three functions acting as switches to generate 8 possible output patterns which will be discussed in further sections. The possible states for the right tail-light was 000 -> 100 -> 110 -> 111, the possible states for the left tail light were 000 -> 001 -> 011 -> 111, for a total of 8 possible output patterns. An application to this specific would only work for the tail lights of cars, outside of that the 3 circuits that make up this design are quite useful in a lot of applications, like timers, handheld devices, GPU’s for computers etc. The design was made using the Xilinx software and tested in the ModelSim program. For the testing portion of this lab, a completed circuit with the 3 components was needed, it was then passed into ModelSim which showed the student waveforms which could be interpreted to see if the circuit was made correctly. The rest of this report will contain the specifications and requirements of the circuit, the process and design, testing and implementation and lastly the conclusion. 2.0 Specifications The main components of the T-bird counter that were designed in this lab were the left control box, the right control box and a counter, the three were then connected together to make the functional circuit. For both the control boxes there were 4 inputs: left (L), right (R), Brake (B), and Reset (R). Then the outputs were 3 lights: LITE_1, LITE_2, LITE_3. Both of the control boxes were quite similar, except for one having one of the inputs inverted. The counter circuit consisted of three inputs: clock (CLK), reset (RST) and signal storing memory (D). The inputs were then sent to 4 outputs LITE_1, LITE_2, LITE_3 and Emerg. The counter itself was made out of a D-flip-flop which was created in the prelab question 1, and it had a reset input, which automatically made Q equal to zero, allowing the user to store the inputs as memory. Since the circuit was made in Xilinx there were almost no limitations to the gate types or amount of gates that could be used. There is no power or time limit, the circuit is quite small so supplying sufficient power is not difficult, there is also no time limit however, if the switches are not pressed the circuit will not activate.

3.0 Design 3.1 Divide by two circuit The first component which needed to be built was the divide by two circuit, the divide by two circuit is a d-flip-flop. The input Clock signal was passed through this circuit and was divided by 2, to output the frequency over every 2nd rising clock edge. The following figure shows both the divide by two and the d flip-flop circuits. Figure 1 showing the divide by two circuit made in pre-lab question 1. 3.2 Counter circuit The next circuit that was needed to be built was the counter circuit, the counter circuit has 2 inputs clock and reset, which are sent into the d flip-flop indicated as D on the circuit which inverts the outputs and sends it back through again. The counter circuit has 4 outputs: LITE_1, LITE_2, LITE_3 and Emerg, these outputs are activated by taking the Q0 output which was previously inverted, and everytime the signal is passed through the d-flip-flop the outputs change, resulting in different tail-lights being activated. The next figure demonstrates the completed counter circuit which was completed during the lab.

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Figure 2 showing the completed counter circuit created in the lab. The circuit was derived from the equations obtained from the truth table during the pre-lab; the following figure shows the completed truth table. Figure 3 showing the completed truth table created in the pre-lab using table 1. After completing the truth table the equations for the circuit were derived and were used to build the completed circuit, the following figure 4 shows the equations obtained. Figure 4 showing the equations derived from the truth table made in the pre-lab. 3.3 Left control box

The next part of the circuit was to build the left and right control boxes. The left control box was made by deriving equations from a truth table. The left control box takes 4 inputs which are Left turn (L), Right turn (R), Brake (B) and Emergency lights (Emerg). Then outputs them in different combinations producing the outputs 000 -> 001 -> 011 -> 111. The following is a truth table from which the equations were derived. Figure 5 showing the truth table for the left side The equations obtained from the truth table are shown down below in figure 6 Figure 6 showing the equations derived from the truth table After these equations were obtained they had to be simplified in order for the circuit not to consist of too many logic gates. To do this a karnaugh map was used to simplify the equations, the next figure 7 shows the karnaugh map and the simplified equations obtained.

Figure 7 showing the karnaugh map and the simplified equations. After obtaining the equations the complete circuit was designed in the xilinx software. The next figure 8 shows the completed circuit. Figure 8 showing the completed left control box. 3.4 Right control box The right control box follows the same process of the left control box, the first part is to complete the truth table, which can be seen in the following figure 9.

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Figure 9 showing the truth table for the right side. The equations were then derived from the truth table and a karnaugh map was made, then the equations were simplified and the results can be seen in figure 10. The difference between the left and right control box is that the inputs L and R are different from each other with 1 circuit having the L inverted and one having the R inverted. Figure 10 showing the simplified equations obtained from the karnaugh map. Then after obtaining the equations the circuit was constructed. The following figure 11 shows the completed circuit.

Figure 11 showing the completed circuit for the right control box. 3.5 completed circuit After all of the circuits were assembled the last step was to assemble the completed t-bird tail- light circuit which consisted of connecting the 3 circuits together and connecting the inputs and outputs producing the completed circuit which can be seen in figure 12 down below. Figure 12 showing the completed circuit for the t-bird tail-lights control. 4.0 Implementation and Testing During the pre-lab, individual circuits and their components were derived from equations and were all drawn out. The circuits were then all individually checked to see if there were any errors

in the derivation process, and the built in Xilinx tool for checking schematics was used, no issues were found in any of them. However when the circuit was simulated the test case 5 was wrong, with the help of TA Nicole the problem was identified. The problem was that there were no inverters for input B and instead input L was inverted. After fixing the issue and running the waveform simulation program no errors were found and all the test cases looked correct. The following figure 13 shows the generated waveforms obtained from the T-bird tail-light circuit. Figure 13 showing the generated waveforms of the T-bird tail-light circuit. In question 6 of the pre-lab the student was tasked in filling in the test cases for this circuit, the following figure 14 shows all of the test cases for this circuit. The total number of cases being 8, for the 8 possible combinations of the circuit.

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Figure 14 showing 8 possible test cases for the circuit numbered from 0-7 for a total of 8.

Test case 0 was the first testing output having all of the switches off, the first test case 0 can be seen in the following figure 15 annotated with red lines for ease of access. In this test case all of the lights LRB are off producing no waveform but a straight line. Figure 15 showing the annotated waveforms of test case 0 producing straight lines. Test case 1 was the next testing output, which was the left turning signal, with the right signal being off. The following figure 16 shows the annotated test case with red lines. In this test case L = 1, R,B = 0. Figure 16 showing the annotated waveforms for test case 1, the inputs produced were for left turn signal only. Test case 2 was the next testing output, which was for the right signal, with the left signal being off. The following figure 17 shows the annotated test case with red lines. In this test case R = 1, L,B = 0. Figure 17 showing the annotated waveforms for test case 2, the outputs produced were for right turn signal only

Test case 3 was the next testing output which was for braking, in this test case all of the lights were turned on. The following figure 18 shows the annotated test case with red lines. In this test case B = 1, L,R = 0. Figure 18 shows the annotated test case for test 3, for this all the outputs were on. Test case 4 was the next testing output, which was for brake and left flashers. In this test case the right tail-lights were on while the left were flashing. In the following figure 19 the test cases are annotated with red lines. In this test case B = 1, L = 1, R = 0. Figure 19 shows the annotated test case for test 4, for this brake and left flashers are on Test case 5 was the next testing output which was emergency flashers, both the tail-lights were flashing in this case. The following figure 20 shows the annotated test case for test 5 in red, in this test B = 0, L,R = 1. Figure 20 shows the annotated test case for test 5, for this both flashers were on, producing the effect of emergency lights

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Test case 6 was the next testing output which was brake and right flashers, for this the left side had all signals on, while the right had the right flashers on. The following figure 21 shows the annotated test case for test 6 in red, in this test B,R = 1, L = 0. Figure 21 showing test case 6, the left flashers are all on, and the right ones are flashing Lastly was test case 7 which was all of the signals on, both sides had all signals on. The following figure 22 shows the annotated test case for test 7 in red, in this B,L,R = 1. Figure 22 showing test case 7, all of the flashers are on 5.0 Conclusion In this lab the design of a T-bird tail-light circuit was achieved, this circuit allowed the user to control 6 sets of tail-lights, 3 for each side, with all of the lights producing a combination of 8 outputs. These were all built in the Xilinx software and tested individually, then a waveform was generated in ModelSim. The waveform allowed the user to check each individual test case and make sure everything was correct. For this the testing was partial as it showed 8 possible outputs for the circuit, although many more weird combinations could be achieved. All of the designs in this were built from AND’s, ORs, X-OR, and inverters, as well as the D-flip-flop acting as a memory element. The use of CLPD proved to be a great experience as it further allowed for testing of outputs to fully understand how CLPD’s work.

References Shams, M., 2021. Lab 3 Intro and Prelab . [ebook] Ottawa: Maitham Shams. Available at: <https://brightspace.carleton.ca/d2l/le/content/57333/viewContent/2500917/View> [Accessed 7 March 2022].