Lab 7 - Tech 63

The numbers from 0-9 and a no characters is the Basic 1 digit seven segment display * .can show False True In a (CA) method of 7 segments, the anodes of all the LED segments are * "connected to the logic "O False True Some times may run out of pins on your Arduino board and need to not extend it * .with shift registers True False

Objectives: To demonstrate the operation, characteristics and design of a saturated bipolar transistor switch Material Needed : 1- 2N2222A NPN transistor 1- 1k ohms resistor 1 - 4.7k ohms resistor 1- 470k ohms resistor ELECTRONIC WORKBENCH Procedure 1. Construct the circuit shown in Fig 1-1. The circuit receives its input from data switch SW1. You will monitor the output at the collector with a voltmeter. +Vcc Rc =1K Vo OUTPUT [SPACEBAR] to switch [Space] Rg=470k VCE SW1 Figure 1-1

1.) A single instruction to clear the lower 4 bits of accumulator in 8085 alp is, a) XRI FOH b) XRI OFH c) ANI OFH d) ANI FO 2.) The status of Z, AC, CY flags after execution of following instructions are, MVI A, A9H MVI B, 57H ADD B HLT a) 0,1,1 b) 1,0,0 c) 1,1,1 d) 1,0,1 3.) Consider the loop: LXI H 000A MVI C OB LOOP: DCX H DCR C JNZ LOOP HLT This loop will be executed by: a) infinite times b) 11 time c) 10 times d) 1 time

not use ai please

please show work included   4. If a 6-bit binary number is used to represent an analog value in the range from -63 to 126, what is the accuracy of the system? In other words, if the binary number is incremented by one, how much change does it represent in the analog value?

c. Sketch the zero-pole plot and the direct form II diagram of the completed design out of part b. d. Calculate and sketch the output sequence after feeding x [n] into this system.

Q4(a) Adder is divided into three types which are half adder, full adder, and parallel adder. Illustrate the implementation of full adder using half adder with necessary logic gates. (i) (ii) Figure Q4(a)(ii) shows the input timing diagram for a full adder. Illustrate the timing diagrams for output S and Cout- Cin Cout Figure Q4(a)(ii)

5) Draw the circuit diagram using diode and write the truth table of a logic gates whose output will be the logical OR operation of two inputs.

Q4(a) Adder is divided into three types which are half adder, full adder, and parallel adder. Illustrate the implementation of full adder using half adder with necessary logic gates. (i) (ii) Figure Q4(a)(ii) shows the input timing diagram for a full adder. Illustrate the timing diagrams for output S and Cout- B Cin Cout Figure Q4(a)(ii) (iii) Given A = 111001 and B = 100010. Construct a 6-bit parallel adder to solve for A + B.

List 8051's primary characteristics. Explain the basic microcontroller block diagram using a clean and labelled graphic. Embedded system introduction

1. Consider the CRC generator shown below. Determine the output of the CRC circuit (i.e. Q4 Q3 Q2 Q1 Q0, expressed as a decimal number) for the input sequence "1010" (input one bit at a time, left to right). Assume the CRC circuit is initialized to state 11111. D Q0 Q2 Q4 Q1 Q3 Clock - Data In