CPSC_121_Pre_Lab_06_Submission_2022W1__Copy_

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CPSC 121 Pre Lab 6 Pre Lab 6 Instructions: 1. Do not change the questions and document that is given. Simply add solutions by editing this document, using the soln environment we provided as follows: \begin{soln} My solution is here. \end{soln} Your solution will then appear in blue, and be easier to differentiate from the rest of the document. 2. If you need more space, add a page between the existing pages using the \newpage com- mand. 3. Export the completed assignment as a PDF file for upload to gradescope. Academic Conduct: I certify that my assignment follows the academic conduct rules for of CPSC 121 as outlined on the course website. As part of those rules, when collaborating with anyone, all of the below statements are true: 1. I and my collaborators took no record but names away. 2. After a suitable break, I am submitting without help from anyone other than the course staff. 1

CPSC 121 Pre Lab 6 This lab will focus on working with Sequential circuits, which are circuits where the output depends on the previous output. Watch the short video titled "Sequential Circuits.mp4" on Canvas under Pages > Labs to familiarize yourself with analyzing circuits to prepare for Lab 6. With sequential circuits, we often work with components called registers - you created one in Lab 5 which we referred to as a ’shift register’. A Register is a multi-bit flip flop with the same functionality and behaviour. Remember how flip-flops work - whenever the clock input changes from 0 to 1, the flip-flop will store a new value. Any value stored into a flip-flop/register will be the value from the previous clock cycle. As an example/refresher to illustrate this, consider a circuit where we’re in the first time cycle - the input value in the circuit corresponds to a 1 . The clock then ticks high (going LOW to HIGH), causing the register to take in a new value Time passes and the new register value a 1 propagates through the circuit, leading to the input of the register changing (by some computation). The new register input in cycle 2 is a 2 . 2

CPSC 121 Pre Lab 6 As you can see, the value currently stored in the register is one clock cycle behind the rest of the circuit . 3

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CPSC 121 Pre Lab 6 1. [0.5 marks] Take a look at the image below, which shows an incomplete sequential circuit that we want to finish implementing so that it simulates counting. That is, starting from 0, the output of the circuit should increase by 1 each time we clock the system. Recall that in the last lab (and lab 4), we looked at a different way of thinking about counting and keeping track of information through updating values according to a clock cycle. This circuit is defined by the formula t n = t n − 1 + 1 (where t 0 = 0 ) uses the previous value of t to get the next one. For example, t 1 = t 0 + 1 = 0 + 1 = 1 t 2 = t 1 + 1 = 1 + 1 = 2 Download the file counter.circ on Canvas (go to Pages > Labs and search for Lab 6 files) and complete the circuit by adding wires and appropriate inputs so that the system increments by 1 each manual clock cycle. Note that the Register is initialized to 0. For this problem, do not use the built in counter available in Logisim. Hint: The inputs to the adder should match the formula given at the top of the page. Where in the circuit can you find the previous output? Figure 1. An incomplete sequential circuit that should simulate counting I connected the clock to the register and the register to one of the adder inputs to create a circuit that satisfies the aforementioned formula for each manual clock cycle. I set the other adder input to 1 for that input. In this method, each cycle, the clock will turn on, registering the input from the adder in the register, and when it turns off, it will just return the previous input, staying the same. The desired outcome will be produced by the adder by adding one from the previous output. 4

CPSC 121 Pre Lab 6 5

CPSC 121 Pre Lab 6 2. In this lab, we will ask you to fix a bugged circuit. For the pre-lab, we want you to identify what’s wrong with it first, with your newfound sequential circuit knowledge. The circuit below is meant to calculate the factorial of a number where the factorial of a positive integer n can be defined as n ! = n · ( n − 1)! for all numbers greater than 0; if n is 0, then n ! is 1. Figure 2. A bugged factorial-computing sequential circuit There are two registers in this circuit. The top one contains our current value n. The bottom register (directly below the other register) should contain the value (n-1)!, our previous factorial output. Again, remember that any value inputted into a flip-flop/register for the current clock cycle will be the value from the previous clock cycle. Answer the following questions about this circuit: • [0.5 marks] Based on the circuit above, what values are being stored in the bottom register? Hint: Trace the wires through the circuit. What is being inputted to the bottom register? Ignore the bottom input to the bottom MUX - this is simply to initialize the circuit. Except for when n = 1, the values being stored on the bottom register is n - 1. • [0.5 marks] Fill in the following table (in decimal/base-10 values). Note: Intended Output refers to what the calculated factorial value n! should be. n Bugged Circuit’s Current Output Intended Output 2 2 2 3 6 6 4 12 24 5 20 120 • [0.5 marks] Looking at your table, what is the bugged circuit currently computing? It is currently producing the output = n(n - 1) 6

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