Wk12L3_Lab_12
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School
New Mexico State University *
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Course
E-E-230
Subject
Electrical Engineering
Date
Feb 20, 2024
Type
docx
Pages
5
Uploaded by SargentNightingale696
Preparation of the report:
The report must be produced electronically using MS-WORD and submitted as a pdf file (e.g. use print to pdf). Tables showing data or results, figures and graphs should be produced
electronically. Tables, figures, graphs and photos are to be embedded in the main body of the report. Include captions and titles for figures, graphs, tables and photos.
Lab Safety:
With proper procedures, the electrical lab is a perfectly safe place in which to work. There are some basic rules: No food or drink is allowed in lab at any time. Liquids are of particular danger as they are ordinarily conductive. While the circuitry used in the lab is normally of no shock hazard, spilling a bottle of water or soda onto such equipment could result in the experimenter receiving a shock.
Notation:
For the schematics, the element notation is as follows:
Resistor value: 2k2 is read 2.2 k Ω Resistor value: 22k is read 22 k Ω
Student: Antonio Luckett
EEE 202 Laboratory Exercise 12: Filter Networks Report
Date:
Procedures Part 1: Low Pass Filter Frequency Response
1.
The input voltage V
in
is a AC voltage with the follow parameters:
a.
Peak voltage of 1 V (ACMAG) b.
Phase Shift Angle of 0˚
2.
Using the OrCad Cadence schematic, construct the circuit and place a probe for V
out
. 3.
Use the PSpice simulator, create a frequency domain plot for V
out
.
4.
From the plot estimate:
a.
The gain in the pass band. -1.5 volts
b.
The cutoff frequency (half-power frequency) 250 Hz
c.
The slope (dB/decade) of the attenuation above the cutoff frequency -30 db / decade
Provide screen shot of the schematic and the probe plot.
Your preview ends here
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Procedures Part 2: High Pass Filter Frequency Response
1.
The input voltage V
in
is a AC voltage with the follow parameters:
a.
Peak voltage of 1 V (ACMAG) b.
Phase Shift Angle of 0˚
2.
Using the OrCad Cadence schematic, construct the circuit and place a probe for V
out
. 3.
Use the PSpice simulator, create a frequency domain plot for V
out
.
4.
From the plot estimate:
a.
The gain in the pass band. .7 volts
b.
The cutoff frequency (half-power frequency) 25 Hz
c.
The slope (dB/decade) of the attenuation below the cutoff frequency -20 db per decade
Provide screen shot of the schematic and the probe plot.
This lesson is adapted from Electronics
by LibreTexts
under a CC BY-NC-SA 3.0 license
. Resulting lesson content by Rio Salado College
under a CC BY-NC-SA 3.0 license
.
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