assignmentHP
.pdf
keyboard_arrow_up
School
Northeastern University *
*We aren’t endorsed by this school
Course
6649
Subject
Electrical Engineering
Date
Jun 14, 2024
Type
Pages
2
Uploaded by bhavyaraoulji
Pandya Hiral UNIVERSITY OF NEW HAVEN
DEPARTMENT OF ECECS
Advanced Network Design & Analysis –
CSCI6649-02
Version 3, January 31, 2023
IP Address Assignment - Due Sunday, 9/24/23 by 11:59 PM
1)
Write the IP address 222.1.1.20
mask 255.255.255.240 in CIDR (/) notation. Ans. 222.1.1.20/28
2)
Write the correct mask value if given 179.10.1.20/26 (
CIDR notation
)
. Ans. 255.255.255.192
3)
You have been allocated a class B network address of 140.10.1.0
and need to create 4 subnets with around 200 hosts. What is the easiest mask to use to satisfy the criteria? Ans.
255.255.255.0/24
4) You are designing a network and given a network address of 155.100.0.0
. You’ve been assigned the task of creating a network that can support a minimum of 1200 hosts per subnet. Taking into consideration each/all possible network addresses and broadcast addresses per subnet, answer the following design questions. a) What is the class network? Ans.
Class B first octet of IP falls between 128-191 b) What is the default mask? Ans.
255.255.0.0=/16 c) After subnetting, how many networks will exist? Ans.
2^5=32 networks d) After subnetting, how many hosts will exist per subnet? Ans.
(
2^11)-2=2048-2=2046 usable hosts per subnet e) What is the subnet mask needed/used for this design? Ans.
2048 addresses, we would need a subnet mask of /21 (255.255.248.0) f) What is this number using the “/” notation?
Ans.
155.100.0.0/21 5) You are designing a network and given a network address of 190.40.5.0
. You’ve been assigned the task of creating a network that can support a minimum of 12 networks. Taking into consideration each/all possible network addresses and broadcast addresses per subnet, answer the following design questions.
Pandya Hiral a) What is the class network? Ans.
Class B first octet of IP falls between 128-191 b) What is the default mask? Ans.
255.255.0.0=16 c) After subnetting, how many networks will exist? Ans.
We would need 2^4 = 16 networks d) After subnetting, how many hosts will exist per subnet? Ans.
(2^12)-2=4094 usable hosts per subnet e) What is the new subnet mask needed/used for this design? Ans.
255.255.240.0 f) What is this number using the “/” notation?
Ans.
190.40.5.0/20 g) Create a table (Excel) showing your subnet #’s (starting with 0), the network address, host address ranges (for each subnet), and the broadcast address for each range. Ans.
Your preview ends here
Eager to read complete document? Join bartleby learn and gain access to the full version
- Access to all documents
- Unlimited textbook solutions
- 24/7 expert homework help
Related Questions
The ______ terminal of the JFET is the equivalent of the base terminal of a BJT.
a.Gate
b.Source
c.Drain
d.None of these
arrow_forward
Note: The previous Answer was Not Correct And Clear.. I was not expecting this from BartleBy
arrow_forward
19. With necessary diagrams and equations, describe the operation of different types of single-phase PWM inverters. Compare multiple-pulse and sinusoidal pulse modulation schemes with single-phase PWM scheme.
arrow_forward
Are the following statements correct or wrong? Justify your answer.
(a) GTO requires very high current applied to its gate to be turn ofr.
(b) IGBT is a current driven device.
(c) IGBT is more efficient than BJT in high power applications.
(d) Thyristors are used only for low voltage, low current applications.
(e) MOSFETS are used for low frequency applications.
arrow_forward
Homework 8
(1) A two-level VSC with the switching frequency
6kHz, the AC line frequency is 60Hz, find the two
lowest frequency harmonics.
(2)An MMC circuit with 201 units in each arms,
find the levels for phase output voltage and line
output voltage.
(3)Make comparison of the properties of VSC and
LCC as inverters.
arrow_forward
Q2) A) Based on the count sequence
and decoding operations of 74LS90S
ICs shown in Figure below.
Q2) B) Use the SAR ADC to
convert the analog voltage of
(7.28 V) to 8-bit binary. If (VREF
= 10V), determine the final
%3D
binary answer and the percent
error.
01011101, 0.1974588%
11011101, 0.1974588%
01011111, 0.1974588%
01111101, 0.1974588%
arrow_forward
am doing revision, pls help for part A and part B, will rate, tq :)
arrow_forward
Construct an nmos circuit with depletion load with the function
parameters are
VDD = 5 V
VTND = 0.4 V, VTNL = -0.6 V,
(W/L)_L =1
Determine (W/L)_d of each transistor where output vo is 40 mv
arrow_forward
25. Repeat Problem 24 using only NAND gates.
arrow_forward
What are MCBs? Explain the working also?
arrow_forward
(a)A typical TTL IC is numbered as
DM54AS04N.Explain the meaning of each portion
of this number?-
(b) What are types of scale of integration? Briefly
explain VLSI?(
(c)Draw the diagram of Monostable Multivibrator
using 555 timer? -
arrow_forward
do all parts
arrow_forward
5
Note: Please do not handwritten.
arrow_forward
The following question is related to isolated de to de converters.(a)Discuss the requirements for electrical isolation in relation to do to deconverters.
arrow_forward
Specify the MCBS required for three (3) ACs, three (3) WHs and 20 (twenty) Socket outlets ?
arrow_forward
SCR's gate recovery time is _____________sec, for the device which is having reverse recovery time is 37 sec and total commutation time is 65 sec.
arrow_forward
Give proper explanation and don't copy from google or any other website
Which of the following are true
When switching devices are connected in series in a two-level
voltage source inverter _______
a. Allows for higher voltage operation
b. Needs voltage balancing during steady state and dynamic cond
itions
c. Improves output voltage quality
d. Increases harmonic components in the output voltage waveform
arrow_forward
Question Vvv
Draw the switching diagram for fifth harmonic elimination in a full-bridge inverter output voltage control scheme.
Please be as descriptive as possible and thank you in advance.
arrow_forward
I need the answer at 20 minute
arrow_forward
About digital system design,
Calculate the following number conversions, complements and arithmetic operations:
No is: 33
arrow_forward
:- Fill the blanks
A. Passive transducers can be classified as Ne
B. Noise coupling methods are
May mads
C. Electronic voltmeters, in general, consist of...
D. In the RS485 protocol the logic state is 1 when
(exacti
state is 0 when...................
E. In the USB protocol to send logic 1 the
send logic 0
F. Photoelectric devices can be categorized as
***********************
and
and .........Ve
************
... and ...............
.............. whereas the logic
Whereas to
and
arrow_forward
Design a two way light control then implement the design using:
A.PAL realization.
B. LUT programme.
C. FPGA with VHDL code.
arrow_forward
SEE MORE QUESTIONS
Recommended textbooks for you
Delmar's Standard Textbook Of Electricity
Electrical Engineering
ISBN:9781337900348
Author:Stephen L. Herman
Publisher:Cengage Learning
Related Questions
- The ______ terminal of the JFET is the equivalent of the base terminal of a BJT. a.Gate b.Source c.Drain d.None of thesearrow_forwardNote: The previous Answer was Not Correct And Clear.. I was not expecting this from BartleByarrow_forward19. With necessary diagrams and equations, describe the operation of different types of single-phase PWM inverters. Compare multiple-pulse and sinusoidal pulse modulation schemes with single-phase PWM scheme.arrow_forward
- Are the following statements correct or wrong? Justify your answer. (a) GTO requires very high current applied to its gate to be turn ofr. (b) IGBT is a current driven device. (c) IGBT is more efficient than BJT in high power applications. (d) Thyristors are used only for low voltage, low current applications. (e) MOSFETS are used for low frequency applications.arrow_forwardHomework 8 (1) A two-level VSC with the switching frequency 6kHz, the AC line frequency is 60Hz, find the two lowest frequency harmonics. (2)An MMC circuit with 201 units in each arms, find the levels for phase output voltage and line output voltage. (3)Make comparison of the properties of VSC and LCC as inverters.arrow_forwardQ2) A) Based on the count sequence and decoding operations of 74LS90S ICs shown in Figure below. Q2) B) Use the SAR ADC to convert the analog voltage of (7.28 V) to 8-bit binary. If (VREF = 10V), determine the final %3D binary answer and the percent error. 01011101, 0.1974588% 11011101, 0.1974588% 01011111, 0.1974588% 01111101, 0.1974588%arrow_forward
- am doing revision, pls help for part A and part B, will rate, tq :)arrow_forwardConstruct an nmos circuit with depletion load with the function parameters are VDD = 5 V VTND = 0.4 V, VTNL = -0.6 V, (W/L)_L =1 Determine (W/L)_d of each transistor where output vo is 40 mvarrow_forward25. Repeat Problem 24 using only NAND gates.arrow_forward
- What are MCBs? Explain the working also?arrow_forward(a)A typical TTL IC is numbered as DM54AS04N.Explain the meaning of each portion of this number?- (b) What are types of scale of integration? Briefly explain VLSI?( (c)Draw the diagram of Monostable Multivibrator using 555 timer? -arrow_forwarddo all partsarrow_forward
arrow_back_ios
SEE MORE QUESTIONS
arrow_forward_ios
Recommended textbooks for you
- Delmar's Standard Textbook Of ElectricityElectrical EngineeringISBN:9781337900348Author:Stephen L. HermanPublisher:Cengage Learning
Delmar's Standard Textbook Of Electricity
Electrical Engineering
ISBN:9781337900348
Author:Stephen L. Herman
Publisher:Cengage Learning