Eee hw 3

Suppose a circuit is required to recognize the 3- bit pattern (101), and output (z=1) whenever it occurs in the continues serial input (X) to the circuit.

To display the hexademical value of a 4- bit number on a 7-segement display. the LEDs of the seven segment compnent are lit with a logical "0" (actice low). The inputs are (active high). a) complete the below truth tablee for each output b) Using Karnaugh map provide the simplifed expession for each output(a,b,c,d)

2) Design a 2-to-1 multiplexer in which the inputs and outputs consist of single bits. Provide the truth table for this multiplexer using IN0 and IN1 for the two inputs, S for the select line and OUT for the output correctly. Obtain the minimal standard sum-of-products expression for the output correctly. PS: Number 2 will be used to help answer number 3 3) Obtain the schematic diagram for the mux designed in 2). Use proper conventions as to the labelling of part numbers, instance numbers and pin numbers correctly.

1. Design a 4-bit combinational circuit that adds one (1) to the input if the input is less than seven. Otherwise, subtracts one. Include the truth table and decoder implementation. 2.Implement using a multiplexer:   F (A,B,C,D) = ∑(0,2,3,4,7,8,10,13,15)   -Include truth table and multiplexer   implementation. 3.Draw a 5-bit Adder-Subtractor circuit.

In ADC, as you increase the number of bits, you can convert analogue signal to digital signal in smaller steps. True False

Discussion: 1. Implement the Boolean expression: F( x, y, z) = (1, 2, 6, 7) Using a 8 to 1 Mux 2. Implement the Boolean expression: F (A, B, C, D) = (1,3, 4, 11, 12, 13, 14,15) Using a 8 to 1 Mux 3. What are the applications of multiplexer and de-multiplexer?

In the given circuit, X, Y, Z are input variables. When the truth table of this system is drawn, in which point the values ​​of Q variable are respectively given? (Z and A are LSB. U1 is 8x1 multiplexer integrated. Zero stop is at the far left.) A  00010100 B  00001010 C  00100001 D  10000010 E  01001000

In designing of a binary counter with states A (MSB) and B (LSB), the derived input equations are as follows TA = BOx and TB =1. Where x is input. When x = 1, the counter counts O a. AB: 00 --> 01 --> 10 --> 11 --> 00 Ob. AB: none of these AB: 11 -->10 --> 01 --> 00 -->11 O d. AB: 11--> 01 --> 10 --> 00 --> 11

3) Show how two 4:1 and one 2:1 mux could be connected to form an 8:1 mux. 4) Given the multiplexer below, what is Boolean function J(A,B,C)? Write your answer in Em notation. C 4X1 MUX "1- А В

Hiii could you help me to solve thisss?? Thankks a loot!

6. Which one of the following statements is true? A decoder has n inputs and log2 n (log n to the base 2) outputs, an encoder has log2 n (log n to the base 2) inputs and n outputs A decoder has n inputs and 2n outputs, an encoder has 2n inputs and n outputs A decoder has n inputs and 2^n (2 to the power n) outputs, an encoder has 2^n (2 to the power n) inputs and n outputs An encoder has n inputs and 2^n (2 to the power n) outputs, a decoder has 2^n (2 to the power n) inputs andn outputs

In the given circuit X, Y, Z are input variables. When the truth table of this system is drawn, in which point the yalues of Q yariable are respectively given? (Z and A are LSB. Ul is 8x1 multiplexer integrated. Zero stop is at the far left.) U1 O Q X0 X1 X2 X3 Y 15 X4 14 X5 13 X6 12 X7 11 A 10 74151 A O 00001010 B O 00010100 O 01001000 D O 10000010 O 00100001

Please help and be very thorough

An analog signal having frequency as 7,30 KHz is digitized and stored in a file. If the total time of the signal is 15 min and the file size is 2,45 Mbit , which answer is correct? O a. Bit = 8 bits Data Rate = 116,8 Kbps O b. Bit = 7 bits Data Rate = 70,1 Kbps O c. Bit = 4 bits Data Rate = 58,4 Kbps O d. Bit = 4 bits Data Rate = 77,9 Kbps O e. Bit = 8 bits Data Rate = 58,4 Kbps

Design a combinational circuit with three inputs x,y,z and three outputs, A,B, C. When the binary input is 0, 1, 2 or 3, the binary output is one greater than the input. When the binary input is 4,5, 6 or 7, the binary output is one less than the input. Show truth table.

Haming code

I think part a and b are done correctly so its more for part d, thank u!

Given: The 16-to-1 Multiplexer's inputs are w0, w1, w2, w3, w4, w5, w6, w7, w8, w9, w10, and w11. The last four inputs aren't connected to an input signal. Task: How many select bits are needed in the 16-to-1 Multiplexer? Draw the schematic of the 16-to-1 Multiplexer, showing inputs and outputs.

In a digital communication system known as QPSK, one of four symbols {A, B, C, D} is transmitted at a time. The channel characteristics are indicated in the figure below.The prior probabilities of the input symbols are given to be: Pr[AS] = 3/16, Pr[BS] = 1/4, Pr[CS] = 5/16, Pr[DS] = 1/4.   (a) What is the probability of receiving an A? (b) Determine the probability of error in this channel. (c) Given that D is received, find the probability that (i) A was sent, (ii) B was sent, (iii) C was sent, and (iv) D was sent.

Please give deatiled solution for good understanding

In designing of a binary counter with states A (MSB) and B (LSB), the derived input equations are as follows TA = BOx and TB =1. Where x is input. When x = 1, the counter counts AB: 11 -->10 --> 01 --> 00 -->11 а. O b. AB: none of these O c. AB: 00 --> 01 --> 10 --> 11 --> 00 d. AB: 11 --> 01 --> 10 --> 00 --> 11

i need the answer quickly

7. Use the truth table below to create a circuit in verilog HDL with three inputs (x,y,z) and four outputs (a,b,c,d) with each output equal to the truth table below. Show your HDL code as well as the simulation results. X 0 0 0 0 1 1 1 1 y 0 0 1 1 0 0 1 1 z 0 1 0 1 0 1 0 1 a 1 1 1 1 0 1 1 0 b 1 1 0 0 1 1 0 1 с 0 1 0 1 0 1 1 1 d 1 0 0 1 0 0 1

m7 m6 ms 3 to 8 m4 Y. Decoder my m2 mo The corresponding Boolean function AXY.Z) realized by the PROM shown in Figure is O a. ADXY.Z) = XY + XZ Ob ADXY.Z) - XYz +XYZ Oc AXYZ) - XY +XZ Od AXY.Z) = X'Y + XZ

Q2. Construct the Mealy and Moore state diagrams for a sequence detector that outputs a 1 when the pattern 100 is detected in the data stream. Sample sequence of data. Fill in the output z 01 0 1 1 1 0 01 0 0 Input (x) Output (z) 00 1000 101 0 0 10 1 001 a) Draw the Mealy State diagram

- Explain the difference between binary and BCD using a decimal value 20. - Draw the truth table of the below MUX. For the multiplexer in the figure below, determine the output for the following input states: A=0, B=1, C=1, D=0, So=0, S1=1. Explain your answer. A MUX В 4 to 1 D- si só -How do you explain a DMUX using the above MUX concept?