Homework 5 - Fall-2023

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San Jose State University *

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102

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Computer Science

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Feb 20, 2024

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Homework 5 – Due Dec 05, 2023 at 11.59 pm Total: 150 points Problem 1: (30 points) Suppose we have a 4 KB direct-mapped data cache with 4-byte blocks. a) Show how a 32-bit memory address is divided into tag, index and offset. Show clearly how many bits are in each field. (10 points) b) How many total bits are there in this cache? (10 points) c) Consider this address trace: 0x48014554 0x48014548 0x48014754 0x48034760 0x48014554 0x48014560 0x48014760 0x48014554 For this cache, for each address in the above trace, show the tag, index and offset in binary (or hex). Indicate whether each reference is a hit or a miss. What is the miss rate? (10 points) Problem 2: (30 points) Suppose we have a 32KB direct-mapped data cache with 32-byte blocks. a) Show how a 32-bit memory address is divided into tag, index and offset. Show clearly how many bits are in each field. (10 points) b) How many total bits are there in this cache? (10 points) c) For this cache, for each address in the trace in Problem 1c, show the tag, index and offset in binary. Indicate whether each reference is a hit or a miss. What is the miss rate? (10 points) Problem 3: (30 points) Suppose we have a 128KB 4-way set-associative data cache with 16-byte blocks. a) Show how a 32-bit memory address is divided into tag, index and offset. Show clearly how many bits are in each field. (8 points)

b) How many total bits are there in this cache? Count only valid, tag and data bits; don’t worry about dirty or LRU bits. (7 points) Problem 4: (10 points) Suppose that we want to compare caches in Problems 1 and 2. Let both caches have a hit time of 1 cycle. The cache in Problem 1 has a miss penalty of 20 cycles. The cache in Problem 2 has a miss penalty of 40 cycles. Calculate the total time taken (in cycles) for all accesses for each cache. Problem 5: (5 points) Distinguish the following events as (a) interrupts or exceptions, and (b) from where the events occur (external or internal). i) I/O device request ii) Invoke the operating system from the user program iii) Arithmetic overflow iv) Using an undefined instruction v) Hardware malfunctions. Problem 6: (5 points) i) What is the basic action the processor must perform when an exception occurs? ii) To implement the exception system used in the MIPS architecture, what are the two additional registers that we need to add to our MIPS implementation? Describe the two registers. Problem 7: (10 points) Show the machine representation for the following MIPS instruction: bgtz $9, check_val Suppose that the address of the above instruction is 340 (decimal) and the address of the label check_val (which is present at some other place in the program and is not given here) is 128 (decimal), compute the offset in (a) bytes (b) words. Problem 8: (10 points) Compute the (a) transfer time, (b) average rotational latency, and (c) disk access time for the following input data for a disk? Rotational speed = 7200 rpm, sector size = 0.5 KB, average seek time = 5.7 ms, transfer rate = 24.5 MB per sec, controller overhead = 1 ms.

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