midterm1-23w

EECS 373 Midterm 1 Winter 2023 9 February 2023 No calculators, reference material, internet, or communicating with others about the exam (except course staff). Name UM Uniqname Sign below to acknowledge the Engineering Honor Code: “I have neither given nor received aid on this examination, nor have I concealed a violation of the Honor Code.” Signature The number of points per problem are not well correlated to the time required. This is intentional, as we want students with good basic knowledge to get reasonably high scores, but for students with deeper understanding to receive higher scores. 1

1 Short questions (12 points) Embedded system definition and market Technology trends Embedded applications 1. Why is it common for an embedded system development team to be smaller than a team developing a general-purpose microprocessor? Select one. (3 points) ⃝ The entire embedded systems market is smaller than the general-purpose computing market, so the design teams must be smaller. ⃝ Embedded systems typically have fewer and looser design constraints than general-purpose computing sys- tems, reducing the number of designers needed. ⃝ To be general-purpose, there must be numerous variants of the microprocessor design that are dynamically selected at run time. Each variant must be designed, requiring a large design team. ⃝ The embedded systems market is fragmented, so a particular embedded design may have a smaller market than a single microprocessor design, thus constraining the total pay justified for an engineering team. ⃝ Embedded systems have real-time constraints, which simplifies their design process. 2. The following list of common requirements for embedded systems was presented in the first lecture. Indicate one that is equally applicable to general-purpose computers. (3 points) ⃝ Timely (hard real-time). ⃝ Wireless. ⃝ Reliable. ⃝ First time correct. ⃝ Rapidly implemented. ⃝ Low price. ⃝ High performance. ⃝ Low power. ⃝ Embodying deep domain knowledge. ⃝ Beautiful. 3. In what context would you most likely find an LPWAN used? Select one. (3 points) ⃝ Wireless video streaming security application. ⃝ Low data rate agricultural sensor network spanning several acres. ⃝ Sensor network within an automobile. ⃝ Infrastructure-powered home automation network. ⃝ Wearable device communicating with a smartphone carried by the user. 4. Is it possible for peripherals on an open-collector bus that produce high outputs simultaneously (i.e., at incorrect times) but are otherwise correctly designed to produce a short-circuit? (3 points) ⃝ Yes. ⃝ No. Page 2

3 ARM assembly (12 points) Write an ARM assembly language procedure that implements the C function “move alnum” in an ABI compliant manner. Clearly comment your code. Label which registers each value represents. Code comments enable partial credit. The function “isalnum” is an ABI compliant function with the following prototype. int isalnum (char c); uint32_t move_alnum(char * input, uint32_t input_size) { char * output = input; uint32_t output_size = 0; int i = 0; while (i != input_size) { char c = *(input + i); // Continue reading in next column. int isalnum = isalnum(c); if (isalnum != 0) { *(output + output_size) = c; ++output_size; } ++i; } return output_size; } Provide your answer here. Although you are not required to use the following assembly instructions, some might be useful in your answer: ADD, B, BEQ, BL, CMP, LDRB, MOV, POP, PUSH, and STRB. Page 4

4 Building (10 points) Based on the following nm symbol listing, indicate all of the following files that may be simultaneously linked with main.o without linking errors. This question is not asking for the minimal set of files that can be linked to main.o without errors; it’s asking for the maximal set. ⃝ a.o ⃝ b.o ⃝ c.o ⃝ d.o ⃝ e.o a.o: 0000000000000000 T func_a b.o: 0000000000000000 T _Z6func_ai c.o: 0000000000000000 t func_a d.o: 0000000000000000 T func_b e.o: 0000000000000000 T main main.o: U func_a 0000000000000000 T main 5 Interrupts (15 points) 1. Fill in the circle marking the method you should use to associate interrupts with ISRs for the ARM processor we are using in lab. The “B” instruction branches to the target address. (5 points) ◦ ◦ g pfnVectors: g pfnJumps: .word estack B estack .word Reset Handler B Reset Handler .word NMI Handler B NMI Handler .word HardFault Handler B HardFault Handler .word MemManage Handler B MemManage Handler . . . . . . 2. Considering the code below, what condition will the data structure referenced by G slhdr be in if the ISR executes at ***B*** when called from ***A***. [X] → NULL indicates a slnode with data X and a next pointer to NULL. [X] → [Y] → NULL indicates an slnode with data X and a next pointer to another slnode with data Y and a next pointer to NULL. Show your work, e.g., in the space to the right of the code. (5 points) ⃝ [NULL] → [7] → [5] → NULL ⃝ [NULL] → [unallocated memory] Page 5

3. After the previous example, select one bubble to indicate whether there will be memory leaks, i.e., heap-allocated objects that are no longer referenced and are therefore impractical to free? (5 points) ⃝ No memory leaks. ⃝ One slnode will leak. ⃝ Two slnodes will leak. ⃝ One slnode and one integer will leak. ⃝ Two slnodes and two integers will leak. ⃝ One slnode and one void will leak. 6 MMIO and APB (17 points) You are given an APB memory-mapped input-output hardware interface that has three push buttons and one LED. Each push button has its own read-only 32-bit memory address and is mapped to bit position 31. The LED has its own write-only 32-bit memory address and is mapped to bit position 0. Below is the implementation of the Verilog module that can be controlled to by writing to the memory-mapped input-output registers. module hello_world_module( input PCLK, input PRESERN, input PSEL, input PENABLE, input [7:0] PADDR, output PREADY, output PSLVERR, input PWRITE, input [31:0] PWDATA, output [31:0] PRDATA, input button_a, input button_b, input button_c, output led); assign PSLVERR = 0; assign PREADY = PENABLE; wire enable, read_a_en, read_b_en, read_c_en; assign enable = PSEL & PENABLE & PWRITE & (PADDR == 0); assign read_a_en = PSEL & PENABLE & ~PWRITE & (PADDR == 4); assign read_b_en = PSEL & PENABLE & ~PWRITE & (PADDR == 8); assign read_c_en = PSEL & PENABLE & ~PWRITE & (PADDR == 12); assign PRDATA[31] = (read_a_en) ? button_a : (read_b_en) ? button_b : (read_c_en) ? button_c : 1’b0; always @(posedge PCLK) begin if (enable) begin led <= PWDATA[0]; end end endmodule 1. Write a C function that reads in the state of three buttons and turns on the LED if all of them are pressed simultaneously. Assume that PSEL is configured to be high when memory locations 0x40050000–0x4005000F are accessed. The buttons and LEDs are active low. You may assume that the buttons will not change states during the duration of this function call. (9 points) Page 7

void hello world fx(void) { } Page 8

7 ABI (12 points) Consider the function “integer binary logarithm” below. int integer_binary_logarithm(uint32_t x); void print_debug(uint32_t current_num, int counter); integer_binary_logarithm: PUSH {LR} MOV r1, #-1 while: BL print_debug CMP r0, #0 BEQ result LSR r0, #1 ADD r1, r1, #1 B while result: MOV r0, r1 POP {PC} It has one argument, uint32 t x, and one return value, which is an integer that is ⌊ log 2 ( x ) ⌋ (note: when x = 0, the function is allowed to return -1). The function “integer binary logarithm” calls an ABI compliant function called “print debug,” implemented by your lab partner, that takes in two integers as arguments to print out. The implementation of “print debug” is not shown. You create a test suite, and on your first round of testing, you find out that integer binary logarithm is behaving as expected and is returning the correct values. You conduct further testing, but this time, you replace your implementation of “print debug” with your friend’s implementation of “print debug,” which is still ABI compliant. You run the same test suite as before for a second round of testing. However, this time, “integer binary logarithm” returns incorrect output. Use at most two sentences to explain why your function failed to reveal the bug. Page 10

8 Timers (10 points) Consider a count-down timer that fires an interrupt and copies the value in MMIO register TOP to its COUNTER register when the COUNTER register reaches zero. The PRESCALER register holds an integer, n . The CPU crystal frequency of 1024 kHz is divided by 2 n before being used to clock the counter. n is 8. If you would like the timer to wait five seconds, fire an interrupt, then periodically fire interrupts once per second after that time, what values should you initialize the COUNTER and TOP registers to? You may only initialize those two registers and you may only write each once, i.e., you may not update them within your ISR. Show your work in the empty space below the question. The registers are large enough to hold any of the unsigned ints listed below. • COUNTER: ⃝ 0 ⃝ 400 ⃝ 500 ⃝ 1000 ⃝ 4000 ⃝ 5000 ⃝ 20000 ⃝ 25000 • TOP: ⃝ 0 ⃝ 400 ⃝ 500 ⃝ 1000 ⃝ 4000 ⃝ 5000 ⃝ 20000 ⃝ 25000 Page 11