Essentials of Computer Organization and Architecture
4th Edition
ISBN: 9781284074482
Author: Linda Null, Julia Lobur
Publisher: Jones & Bartlett Learning
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Expert Solution & Answer
Chapter 4, Problem 41E
Explanation of Solution
Trace out for given “Example 4.3”:
Tracing the program is the process of documenting the state of the various aspects of the execution of the program over assembly instruction. Every instruction has the process like fetch, store, and decode which are used to determine the desired outcome to execute the program.
This tracing has address, label, instruction, RTN, and values of each registers. The trace out for given code “example 4.3” is as follows:
Instruction: Load X
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 100 | - | - | - | - | |
| Fetch | MARßPC | 100 | - | 100 | - | - |
| IRßM[MAR] | 100 | 110C | 100 | - | - | |
| PCßPC+1 | 101 | 110C | 100 | - | - | |
| Decode | MARßIR[11-0] | 101 | 110C | 10C | - | - |
| (Decode IR[15-12] | 101 | 110C | 10C | - | - | |
| Get operand | MBRßM[MAR] | 101 | 110C | 10C | 000C | - |
| Execute | ACßAC-MBR | 101 | 110C | 10C | 000C | 000C |
Instruction: Subt Y
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 101 | 110C | 10C | 000C | 000C | |
| Fetch | MARßPC | 101 | 110C | 101 | 000C | 000C |
| IRßM[MAR] | 101 | 410D | 101 | 000C | 000C | |
| PCßPC+1 | 102 | 410D | 101 | 000C | 000C | |
| Decode | MARßIR[11-0] | 102 | 410D | 101 | 000C | 000C |
| (Decode IR[15-12] | 102 | 410D | 10D | 000C | 000C | |
| Get operand | MBRßM[MAR] | 102 | 410D | 10D | 0014 | 000C |
| Execute | ACßAC-MBR | 102 | 410D | 10D | 0014 | FFF8 |
Instruction: Skipcond 400
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 102 | 410D | 10D | 0014 | FFF8 | |
| Fetch | MARßPC | 102 | 410D | 102 | 0014 | FFF8 |
| IRßM[MAR] | 102 | 8400 | 102 | 0014 | FFF8 | |
| PCßPC+1 | 103 | 8400 | 102 | 0014 | FFF8 | |
| Decode | MARßIR[11-0] | 103 | 8400 | 400 | 0014 | FFF8 |
| (Decode IR[15-12] | 103 | 8400 | 400 | 0014 | FFF8 | |
| Get operand | Not necessary | 103 | 8400 | 400 | 0014 | FFF8 |
| Execute | Do nothing | 103 | 8400 | 400 | 0014 | FFF8 |
Instruction: Jump Else
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 103 | 8400 | 400 | 0014 | FFF8 | |
| Fetch | MARßPC | 103 | 8400 | 103 | 0014 | FFF8 |
| IRßM[MAR] | 103 | 9108 | 103 | 0014 | FFF8 | |
| PCßPC+1 | 104 | 9108 | 103 | 0014 | FFF8 | |
| Decode | MARßIR[11-0] | 104 | 9108 | 108 | 0014 | FFF8 |
| (Decode IR[15-12] | 104 | 9108 | 108 | 0014 | FFF8 | |
| Get operand | Not necessary | 104 | 9108 | 108 | 0014 | FFF8 |
| Execute | PCßIR[11-0] | 108 | 9108 | 108 | 000C | FFF8 |
Instruction: Load Y
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 108 | 9108 | 108 | 000C | FFF8 | |
| Fetch | MARßPC | 108 | 9108 | 108 | 000C | FFF8 |
| IRßM[MAR] | 108 | 110D | 108 | 000C | FFF8 | |
| PCßPC+1 | 109 | 110D | 108 | 000C | FFF8 | |
| Decode | MARßIR[11-0] | 109 | 110D | 10D | 000C | FFF8 |
| (Decode IR[15-12] | 109 | 110D | 10D | 000C | FFF8 | |
| Get operand | MBRßM[MAR] | 109 | 110D | 10D | 0014 | FFF8 |
| Execute | ACßMBR | 109 | 110D | 10D | 0014 | 0014 |
Instruction: Subt X
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 109 | 110D | 10D | 0014 | 0014 | |
| Fetch | MARßPC | 109 | 110D | 109 | 0014 | 0014 |
| IRßM[MAR] | 109 | 410C | 109 | 0014 | 0014 | |
| PCßPC+1 | 10A | 410C | 109 | 0014 | 0014 | |
| Decode | MARßIR[11-0] | 10A | 410C | 10C | 0014 | 0014 |
| (Decode IR[15-12] | 10A | 410C | 10C | 0014 | 0014 | |
| Get operand | MBRßM[MAR] | 10A | 410C | 10C | 000C | 0014 |
| Execute | ACßAC-MBR | 10A | 410C | 10C | 000C | 0008 |
Instruction: Store Y
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 10A | 410C | 10C | 000C | 0008 | |
| Fetch | MARßPC | 10A | 410C | 10A | 000C | 0008 |
| IRßM[MAR] | 10A | 210D | 10A | 000C | 0008 | |
| PCßPC+1 | 10B | 210D | 10A | 000C | 0008 | |
| Decode | MARßIR[11-0] | 10B | 210D | 10D | 000C | 0008 |
| (Decode IR[15-12] | 10B | 210D | 10D | 000C | 0008 | |
| Get operand | Not necessary | 10B | 210D | 10D | 000C | 0008 |
| Execute | MBRßAC | 10B | 210D | 10D | 0008 | 0008 |
| (Changes Y) | M[MAR]ßMBR | 10B | 210D | 10D | 0008 | 0008 |
Instruction: Halt
| Step | RTN | PC | IR | MAR | MBR | AC |
| (initial values) | 10B | 210D | 10D | 0008 | 0008 | |
| Fetch | MARßPC | 10B | 210D | 10B | 0008 | 0008 |
| IRßM[MAR] | 10B | 7000 | 10B | 0008 | 0008 | |
| PCßPC+1 | 10C | 7000 | 10B | 0008 | 0008 | |
| Decode | MARßIR[11-0] | 10C | 7000 | 000 | 0008 | 0008 |
| (Decode IR[15-12] | 10C | 7000 | 000 | 0008 | 0008 | |
| Get operand | Not necessary | 10C | 7000 | 000 | 0008 | 0008 |
| (Changes Y) | Terminate program | 10C | 7000 | 000 | 0008 | 0008 |
Explanation:
From above tables, the register values is based on instruction and each register value being modified according to the micro operation. The new values are shaded in above table which is based on instruction execution.
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Chapter 4 Solutions
Essentials of Computer Organization and Architecture
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