Bundle: Principles of Information Security, Loose-Leaf Version, 6th + MindTap Information Security, 1 term (6 months) Printed Access Card
6th Edition
ISBN: 9781337750714
Author: WHITMAN
Publisher: CENGAGE L
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Chapter 2, Problem 8RQ
Program Plan Intro
Hacker:
It refers to the skilled computer experts who, with the help of their technical knowledge, uses bugs or try to exploit and break into the computer systems. The term “hacker” can be also defined as the one who destabilizes the
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using rapid miner how to creat decison trea for all attribute and another one with delete one or more of them also how i know the weight of each attribute and what that mean in impact the result
Q.1. Architecture performance [10 marks]
Answer
A certain microprocessor requires either 2, 4, or 6 machine cycles to perform various operations.
⚫ (40+g+f)% require 2 machine cycles,
⚫ (30-g) % require 4 machine cycles, and
⚫ (30-f)% require 6 machine cycles.
(a) What is the average number of machine cycles per instruction for this microprocessor?
Answer
(b) What is the clock rate (machine cycles per second) required for this microprocessor to be a
"1000 MIPS" processor?
Answer
(c) Suppose that 35% of the instructions require retrieving an operand from memory which
needs an extra 8 machine cycles. What is the average number of machine cycles per
instruction, including the instructions that fetch operands from memory?
Q.2. Architecture performance [25 marks]
Consider two different implementations, M1 and M2, of the same instruction set. M1 has a clock
rate of 2 GHz and M2 has a clock rate of 3.3 GHz. There are two classes of instructions with the
following CPIs:
Class
A
CPI for M1
CPI for M2
2.f
1.g
B
5
3
C
6
4
Note that the dots in 2 fand 1.g
indicate decimal points and not
multiplication.
a) What are the peak MIPS performances for both machines?
b) Which implementation is faster, if half the instructions executed in a certain program are from
class A, while the rest are divided equally among classes B and C.
c) What speedup factor for the execution of class-A instructions would lead to 20% overall
speedup?
d) What is the maximum possible speedup that can be achieved by only improving the execution
of class-A instructions? Explain why.
e) What is the clock rate required for microprocessor M1 to be a "1000 MIPS" (not peak MIPS)
processor?
Chapter 2 Solutions
Bundle: Principles of Information Security, Loose-Leaf Version, 6th + MindTap Information Security, 1 term (6 months) Printed Access Card
Ch. 2 - Prob. 1RQCh. 2 - Prob. 2RQCh. 2 - Prob. 3RQCh. 2 - Prob. 4RQCh. 2 - Prob. 5RQCh. 2 - Prob. 6RQCh. 2 - Prob. 7RQCh. 2 - Prob. 8RQCh. 2 - Prob. 9RQCh. 2 - Prob. 10RQ
Ch. 2 - Prob. 11RQCh. 2 - Prob. 12RQCh. 2 - Prob. 13RQCh. 2 - Prob. 14RQCh. 2 - Prob. 15RQCh. 2 - Prob. 16RQCh. 2 - Prob. 17RQCh. 2 - Prob. 18RQCh. 2 - Prob. 19RQCh. 2 - Prob. 20RQCh. 2 - Prob. 1ECh. 2 - Prob. 2ECh. 2 - Prob. 3ECh. 2 - Prob. 4ECh. 2 - Prob. 5ECh. 2 - Prob. 1CEDQCh. 2 - Prob. 2CEDQCh. 2 - Prob. 3CEDQCh. 2 - Prob. 1EDM
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