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yte chunks are th warp-around. d in parallel, but lock must be ss may involve lock accesses

yte chunks are th warp-around. d in parallel, but lock must be ss may involve lock accesses

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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A CPU has a cache with block size 64 bytes. The main memory has k blocks, each block being c-bytes wide. Consecutive c-byte chunks are mapped on consecutive blocks with warp-around. All the k blocks can be accessed in parallel, but two accesses to the same block must be serialized. A cache block access may involve multiple iterations of parallel block accesses depending on the amount of data obtained by accessing all the k blocks in parallel. Each iteration requires decoding the block numbers to be accessed in parallel and this takes k/2 ns. The latency of one block access is 80 ns. If c = 2 and k = 24, then latency of retrieving a cache block starting at address zero from main memory iş
Transcribed Image Text:A CPU has a cache with block size 64 bytes. The main memory has k blocks, each block being c-bytes wide. Consecutive c-byte chunks are mapped on consecutive blocks with warp-around. All the k blocks can be accessed in parallel, but two accesses to the same block must be serialized. A cache block access may involve multiple iterations of parallel block accesses depending on the amount of data obtained by accessing all the k blocks in parallel. Each iteration requires decoding the block numbers to be accessed in parallel and this takes k/2 ns. The latency of one block access is 80 ns. If c = 2 and k = 24, then latency of retrieving a cache block starting at address zero from main memory iş
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