Suppose that a task on the ARM computer runs 256M instructions during its execution. The total time it takes to execute an instruction is 120 ns. We make the assumption that the work to be performed by one instruction can be divided into an arbitrary number of pipeline stages. Now complete the following problems. b. Now suppose that the pipelining register delays and processor control overhead adds 10ns to the latency of each pipeline stage. (So, for example, if there are four pipeline stages, each instruction will have an execution latency of 160ns and the pipelined machine produces 1 instruction every 40ns.) What is the maximum speedup that can be obtained through pipelining? Assume there are no hazards (ideal pipelining).
Suppose that a task on the ARM computer runs 256M instructions during its execution. The total time it takes to execute an instruction is 120 ns. We make the assumption that the work to be performed by one instruction can be divided into an arbitrary number of pipeline stages. Now complete the following problems. b. Now suppose that the pipelining register delays and processor control overhead adds 10ns to the latency of each pipeline stage. (So, for example, if there are four pipeline stages, each instruction will have an execution latency of 160ns and the pipelined machine produces 1 instruction every 40ns.) What is the maximum speedup that can be obtained through pipelining? Assume there are no hazards (ideal pipelining).
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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